SC28L194 Philips Semiconductors, SC28L194 Datasheet - Page 36

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SC28L194

Manufacturer Part Number
SC28L194
Description
Quad UART for 3.3V and 5V supply voltage
Manufacturer
Philips Semiconductors
Datasheet

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Philips Semiconductors
RESET CONDITIONS
Device Configuration after Hardware Reset
or CRa cmd=x1F
Cleared registers:
1998 Sep 21
Quad UART for 3.3V and 5V supply voltage
Channel Status Registers (SR)
Channel Interrupt Status Registers (ISR)
Channel Interrupt Mask Registers (IMR)
Channel Interrupt Xon Status Register (XISR)
Interrupt Control Register (ICR)
Global Configuration Control Register (GCCR)
Hence the device enters the asynchronous bus cycling mode.
Current Interrupt Register (CIR)
BRG Timer Run Control Register (BRGTCR)
Watch-dog Timer Run Control Register (WDTRCR)
Channel Input/Output Port Configuration Registers (I/OPCR)
Hence all I/O pins have direction = Input after reset
BRG Counter/Timer Registers
36
Clears Modes for:
Disables:
Halts:
Limitations:
Power down
Test modes
Input Port Changed bits
Gang write to Xon or Xoff
Xon/Xoff/Address detection
Receiver error status
Transmitters
Receivers
Interrupts, current and future
BRG Counters
Bus cycle in progress (hardware RESET only)
Minimum RESETN pin pulse width is 10 SClk cycles after Vcc
reaches operational range
The user must allow a minimum of 6 SClk cycles to elapse after
a reset (RESETN pin or CRa initiated) of the device terminates
before initiating a new bus cycle.
Preliminary specification
SC28L194

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