HM-6561 Intersil Corporation, HM-6561 Datasheet - Page 8

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HM-6561

Manufacturer Part Number
HM-6561
Description
256 x 4 CMOS RAM
Manufacturer
Intersil Corporation
Datasheet
is the minimum write pulse. At the end of the write period, if
W rises before either select the outputs will enable reading
data just written. They will not disable until either select goes
high (TSHQZ).
Burn-In Circuit
NOTES:
All resistors 47k
F0 = 100kHz 10%.
F1 = F0
VCC = 5.5V 0.5V.
VIH = 4.5V 10%.
VIL = -0.2V to +0.4V.
C1 = 0.01 F Min.
CASE 1
CASE 2
2, F2 = F1
Both S1 and S2 = Low
Before W = Low
W = Low Before Both
S1 and S2 = Low
5%.
2, F3 = F2
IF
2 . . . F12 = F11
F6
F5
F4
F3
F8
F9
F10
F0
OBSERVE
TWLWH
TDVWH
TDVWH
TWLQZ
TWLDV
2.
1
2
3
4
5
6
7
8
9
IGNORE
TWLWH
TWLQZ
TWLDV
A3
A2
A1
A0
A5
A6
A7
GND
E
HM-6561/883
HM-6561/883
CERDIP
6-124
VCC
DQ3
DQ2
DQ1
DQ0
If a series of consecutive write cycles are to be performed,
W may remain low until all desired locations are written. This
is an extension of Case 2.
Read-Modify-Write cycles and Read-Write-Read cycles can
be performed (extension of Case 1). In fact data may be
modified as many times as desired with E remaining low.
A4
S1
S2
W
18
17
16
15
14
13
12
11
10
VCC
C1
F7
F1
F0
F2
F2
F2
F2
F0

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