GS1503B Gennum Corporation, GS1503B Datasheet - Page 57
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GS1503B
Manufacturer Part Number
GS1503B
Description
Hd Embedded Audio Codec
Manufacturer
Gennum Corporation
Datasheet
1.GS1503B.pdf
(88 pages)
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Table 5-6: Register Settings (Default Mode)
5.5 Video Data Processing
5.5.1 Video Signal Input Detection
Table 5-7: Register Settings
5.5.2 Video Input CRC Error Detection
Table 5-8: Register Settings
Name
SCRBYPASS
Name
VIDEO_DET
Name
CRC_ERR
CRC_CNT[11:0]
Description
0: SMPTE 292M scrambling enabled
1: Bypass SMPTE 292M scrambling
Description
Video input signal detection (1: Detection)
Description
Video input signal CRC error detection (1: Detection)
Video input signal CRC error accumulation in 1 video
frame
The GS1503B will set the VIDEO_DET external pin HIGH when three consecutive
TRS are detected in the input video signal. Also, the VIDEO_DET bit of Host
Interface register 000h is set HIGH.
The GS1503B will set the CRC_ERR external pin HIGH when a CRC error is
detected in the input video signal. Also, the CRC_ERR bit 5 of Host Interface
register 000h is set HIGH. The number of CRC errors accumulated in one video
frame can be read form CRC_CNT[11:0] in Host Interface registers 006h and 007h.
Proprietary and Confidential
37953 - 0
Address
Address
Address
001
000
000
006
007
August 2006
Bit
Bit
Bit
3-0
7-0
2
6
5
GS1503B Data Sheet
Setting
Setting
Setting
0
–
–
–
Default
Default
Default
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0
0
0
0
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