GS1503B Gennum Corporation, GS1503B Datasheet - Page 76

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GS1503B

Manufacturer Part Number
GS1503B
Description
Hd Embedded Audio Codec
Manufacturer
Gennum Corporation
Datasheet
Table 5-29: Demultiplex Mode Host Interface Registers (Continued)
Control
Item
Audio
Name
HBLK_INS
LN_INS
TRS_INS
AM_SEL
RSV
AM[1:0]
RSV
DECMODE
MUXERRB
MUXERRA
Description
Horizontal blanking enable. When set HIGH, the
output video horizontal blanking, including TRS, line
numbers and line CRC words, will be set to 040h for
the Luma channel and 200h for the Chroma
channel.
NOTE: If blanking of line numbers and TRS words is
required, LN_INS and TRS_INS must be set LOW.
Line insertion enable. When set HIGH, the
GS1503B will insert line numbers into the video data
stream. When set LOW, existing line numbers will
remain in the output video stream.
TRS insertion enable. When set HIGH, the
GS1503B will insert TRS codes into the video data
stream. When set LOW, existing TRS codes will
remain in the output video stream.
Audio input format (external pin/register)
configuration select. When set LOW, the audio input
format is configured via the AM[1:0] pins. When set
HIGH, the audio input format is configured via the
"AM[1:0]" bits.
Not used.
Audio input format select. See
when "AM_SEL" is HIGH.
Not used.
Demultiplex Mode select. When set HIGH, the
GS1503B requires a 48kHz word clock input at
WCINA and WCINB. This word clock must be
synchronous to the word clock used to embed the
audio data. The embedded clock information in the
audio data packet will be ignored.
See
NOTE: The status of the DEC_MODE external pin is
not updated in this register. The value programmed
in this register is logical OR'd with the DEC_MODE
external pin setting.
Ch5-8 audio sample clock error. When set HIGH,
the GS1503B is unable to recover the audio clock
phase data in the embedded audio data packet for
audio channels 5 to 8. See
Ch1-4 audio sample clock error. When set HIGH,
the GS1503B is unable to recover the audio clock
phase data in the embedded audio data packet for
audio channels 1 to 4. See
Proprietary and Confidential
Section
5.11.
Section
Section
Table
5.11.
5.11.
5-13. Valid
37953 - 0
August 2006
Address
008
008
008
010
010
010
01E
01E
01E
01E
GS1503B Data Sheet
Bit
6-2
1-0
7-3
2
1
0
7
2
1
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
Default
76 of 88
0
1
1
0
0
0
0
0
0
0

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