FAN6520B Fairchild Semiconductor, FAN6520B Datasheet - Page 8

• Manufacturer Part Number: FAN6520B
• Description: Single Synchronous Buck PWM Controller
• Manufacturer: Fairchild Semiconductor

FAN6520B Rev. 1.0.3
Use the following steps to locate the poles and zeros of
the compensation network:
2.
3.
4.
5.
6.
7.
8.
Figure 7 shows an asymptotic plot of the DC-DC con-
verter’s gain vs. frequency. The actual Modulator Gain
has a high gain peak due to the high Q factor of the out-
put filter and is not shown in Figure 7. Using the above
guidelines should give a Compensation Gain similar to
the curve plotted. The open loop error amplifier gain
bounds the compensation gain. Check the compensation
gain at FP2 with the capabilities of the error amplifier.
The Closed Loop Gain is constructed on the graph of
Figure 7 by adding the Modulator Gain (in dB) to the
Compensation Gain (in dB). This is equivalent to multi-
plying the modulator transfer function by the compensa-
tion transfer function and plotting the gain.
The compensation gain uses external impedance net-
works Z
(BW) overall loop. A stable control loop has a gain cross-
ing with a –20dB/decade slope and a phase margin
greater than 45°. Include worst case component varia-
tions when determining phase margin.
An output capacitor is required to filter the output and
supply the load transient current. The filtering require-
ments are a function of the switching frequency and the
ripple current. The load transient requirements are a
function of the slew rate (di/dt) and the magnitude of the
transient load current. These requirements are generally
met with a mix of capacitors and careful layout.
Figure 7. Asymptotic Bode Plot of Converter Gain
100
-20
-40
-60
80
60
40
20
0
Pick gain (R2/R1) for the desired converter band-
width.
Place 1
F
Place 2
Place 1
Place 2
Check gain against the error amplifier’s open-loop
gain.
Estimate phase margin. Repeat if necessary.
LC
10
(R
).
FB
20LOG
2
MODULATOR
/R
and Z
st
nd
st
nd
1
)
GAIN
100
zero below the filter’s double pole (~75%
pole at the ESR zero.
zero at filter’s double pole.
pole at half the switching frequency.
IN
to provide a stable, high bandwidth
1K
F
Z1
F
FREQUENCY (Hz)
LC
F
Z2
10K
F
F
P1
ESR
(V
IN
100K
20LOG
/DV
F
P2
OSC
OPEN LOOP
ERROR AMP GAIN
)
1M
COMPENSATION
CLOSED LOOP
10M
GAIN
GAIN
8
Component Selection
Output Capacitors (C
Modern components and loads are capable of producing
transient load rates above 1A/ns. High frequency capaci-
tors initially supply the transient and slow the current
load rate seen by the bulk capacitors. Effective Series
Resistance (ESR) and voltage rating are typically the
prime considerations for the bulk filter capacitors, rather
than actual capacitance requirements. High-frequency
decoupling capacitors should be placed as close to the
power pins of the load as physically possible. Be careful
not to add inductance in the circuit board wiring that
could cancel the performance of these low inductance
components. Consult with the load manufacturer on spe-
cific decoupling requirements. Use only specialized low-
ESR capacitors intended for switching-regulator applica-
tions for the bulk capacitors. The bulk capacitor’s ESR
will determine the output ripple voltage and the initial
voltage drop after a high slew-rate transient. An alumi-
num electrolytic capacitor’s ESR value is related to the
case size with lower ESR available in larger case sizes.
However, the Equivalent Series Inductance (ESL) of
these capacitors increases with case size and can
reduce the usefulness of the capacitor to high slew-rate
transient loading. Unfortunately, ESL is not a specified
parameter. Work with your capacitor supplier and mea-
sure the capacitor’s impedance with frequency to select
a suitable component. In most cases, multiple electrolytic
capacitors of small case size perform better than a single
large case capacitor.
Output Inductor (L
The output inductor is selected to meet the output volt-
age ripple requirements and minimize the converter’s
response time to the load transient. The inductor value
determines the converter’s ripple current and the ripple
voltage is a function of the ripple current. The ripple volt-
age ( V) and current ( I) are approximated by the follow-
ing equations:
Increasing the inductance value reduces the ripple cur-
rent and voltage. However, a large inductance value
reduces the converter’s ability to quickly respond to a
load transient. One of the parameters limiting the con-
verter’s response to a load transient is the time required
to change the inductor current. Given a sufficiently fast
control loop design, the FAN6520B will provide either 0%
or 100% duty cycle in response to a load transient. The
response time is the time required to slew the inductor
current from an initial current value to the transient cur-
rent level. During this interval the difference between the
inductor current and the transient current level must be
supplied by the output capacitor. Minimizing the response
time can minimize the output capacitance required.
I
=
V
----------------------------- -
IN
F
SW
–
V
OUT
L
OUT
OUT
)
)
V
ESR
www.fairchildsemi.com
I
(1)