HV310 Supertex Inc, HV310 Datasheet - Page 4

• Manufacturer Part Number: HV310
• Description: Hotswap/ Inrush Current Limiter Controllers
• Manufacturer: Supertex Inc

Pinout
Pin Description
PWRGD – The Power Good Output Pin is held inactive on initial
power application and will go active when the external MOSFET
is fully turned on. This pin may be used as an enable control
when connected directly to a PWM power module.
OV – This Over Voltage sense pin, when raised above its high
threshold will immediately cause the GATE pin to be pulled low.
The GATE pin will remain low until the voltage on this pin falls
below the low threshold limit, initiating a new start-up cycle.
UV – This Under Voltage sense pin, when below its low threshold
limit will ensure that the GATE pin is low. The GATE pin will
remain low until the voltage on this pin rises above the high
threshold, initializing a new start-up cycle.
V
circuit.
V
circuit.
EE
DD
Functional Block Diagram
V
V
UV
OV
DD
EE
– This pin is the negative voltage power supply input to the
– This pin is the positive voltage power supply input to the
PWRGD
V
OV
UV
EE
Regulator
Internal
Supply
1
2
3
4
V INT
Vref
Reference
Band Gap
Vref
8
7
6
5
RAMP
V
GATE
SENSE
LOGIC
DD
UVLO
POR
and
SENSE
PWRGD Logic
V
5kΩ
INT –1.2V
4
HV300
HV310
Model
RAMP – This pin provides a current output so that a timing
ramp voltage is generated when a capacitor is connected. The
initial portion of the ramp provides a time delay, which in
conjunction with the Under Voltage detection circuit eliminates
circuit card insertion contact bounce. The RAMP pin also controls
the delay between the current limit mode disengaging and the
PWRGD signal activating; as well as the current rise profile
after the initial turn on delay.
GATE – This is the Gate Driver Output for the external N-
Channel MOSFET.
SENSE – The current sense resistor connected from this pin to
V
mode is established when the voltage drop across this resistor
reaches 50mV.
EE
pin programs the current limit. Constant current output
10µA
RAMP
NOT READY
READY
NOT READY
READY
V
INT
Condition
+
conductor
Trans-
V
REF
–
Buffer
GATE
0
1
1
0
PWRGD
HV300:PWRG
HV310: PWRGD
HV300/HV310
HI Z
HI Z
V
V
EE
EE