MCP2510-EP Microchip Technology, MCP2510-EP Datasheet - Page 39

• Manufacturer Part Number: MCP2510-EP
• Description: Stand-Alone CAN Controller with SPI Interface
• Manufacturer: Microchip Technology

5.10
The configuration registers (CNF1, CNF2, CNF3) con-
trol the bit timing for the CAN bus interface. These reg-
isters can only be modified when the MCP2510 is in
configuration mode (see Section 9.0).
5.10.1
The BRP<5:0> bits control the baud rate prescaler.
These bits set the length of T
input frequency, with the minimum length of T
OSC1 clock cycles in length (when BRP<5:0> are set
to 000000). The SJW<1:0> bits select the synchroniza-
tion jump width in terms of number of T
5.10.2
The PRSEG<2:0> bits set the length, in T
propagation segment. The PHSEG1<2:0> bits set the
length, in T
trols how many times the RXCAN pin is sampled. Set-
REGISTER 5-1: CNF1 - Configuration Register1 (ADDRESS: 2Ah)
1999 Microchip Technology Inc.
bit 7-6: SJW<1:0>: Synchronization Jump Width Length
bit 5-0: BRP<5:0>: Baud Rate Prescaler
bit 7
R/W-0
SJW1
Bit Timing Configuration Registers
CNF1
CNF2
Q
11 = Length = 4 x T
10 = Length = 3 x T
01 = Length = 2 x T
00 = Length = 1 x T
111111 = T
-
-
-
000000 = T
’s, of phase segment 1. The SAM bit con-
R/W-0
SJW0
R/W-0
BRP5
Q
Q
= 2 x 64 x 1/F
= 2 x 1 x 1/F
Q
Q
Q
Q
Q
R/W-0
BRP4
relative to the OSC1
OSC
Q
OSC
’s.
R/W-0
BRP3
Q
Q
’s, of the
being 2
Preliminary
R/W-0
BRP2
R/W-0
BRP1
ting this bit to a ‘1’ causes the bus to be sampled three
times; twice at T
at the normal sample point (which is at the end of
phase segment 1). The value of the bus is determined
to be the value read during at least two of the samples.
If the SAM bit is set to a ‘0’ then the RXCAN pin is sam-
pled only once at the sample point. The BTLMODE bit
controls how the length of phase segment 2 is deter-
mined. If this bit is set to a ‘1’ then the length of phase
segment 2 is determined by the PHSEG2<2:0> bits of
CNF3 (see Section 5.10.3). If the BTLMODE bit is set
to a ‘0’ then the length of phase segment 2 is the
greater of phase segment 1 and the information pro-
cessing time (which is fixed at 2 T
5.10.3
The PHSEG2<2:0> bits set the length, in T
Phase Segment 2, if the CNF2.BTLMODE bit is set to
a ‘1’. If the BTLMODE bit is set to a ‘0’ then the
PHSEG2<2:0> bits have no effect.
bit 0
R/W-0
BRP0
CNF3
Q
/2 before the sample point, and once
R = Readable bit
W = Writable bit
C = Bit can be cleared by
U = Unimplemented -
- n = Value at POR reset
MCU but not set
reads as ‘0’
MCP2510
Q
for the MCP2510).
DS21291C-page 39
Q
’s, of