MC33298 Motorola, MC33298 Datasheet - Page 16

• Manufacturer Part Number: MC33298
• Description: OCTAL SERIAL SWITCH (SPI Input/Output)
• Manufacturer: Motorola

Output Voltage Clamping
voltage clamp to provide fast turn–off and transient protection
of the output. Each clamp independently limits the drain to
source voltage to 65 V at drain currents of 0.5 A and keeps
the output transistors from avalanching by causing the
transient energy to be dissipated in the linear mode (see
Figure 19). The total energy (E J ) can be calculated by
multiplying the current area under the current curve (I A )
during the time the clamp is active and the clamp
voltage (V CL ).
repetitive method at 0.5 A, indicate the maximum energy to
be 100 mJ at 25 C and 25 mJ at 125 C per output. Using a
single pulse non–repetitive method at 0.5 A the clamps are
capable of 2.0 Joules at 25 C and 0.5 Joules at 125 C.
Thermal Model
generate negligible power. In contrast, the output transistors
take up most of the die area and are the primary contributors
of power generation. The thermal model shown in Figure 20
was developed for the MC33298 mounted on a typical PC
board. The model is accurate for both steady state and
transient thermal conditions. The components R d0 , R d1 ,
R d2, ..., and R d7 represent the steady state thermal
resistance of the silicon die for transistor outputs 0, 1, 2, ...,
and 7, while C d0 , C d1 , C d2 , ..., and C d7 represent
the corresponding thermal capacitance of the silicon
die transistor outputs and plastic. The device area and
die thickness determine the values of these specific
components.
mounting flag to the outside environment is represented by
the terms R pkg and C pkg . The steady state thermal resistance
of leads and the PC board make up the steady state package
thermal resistance, R pkg . The thermal capacitance of the
package is made up of the combined capacitance of the flag
and the PC board. The mold compound was not modeled as
a specific component but is factored into the other overall
component values.
ambient temperature the device and PC board are subjected
to. The I PWR current source represents the total power
dissipation and is calculated by adding up the power
dissipation of each individual output transistor. This is easily
done by knowing R DS(on) and load current of the
individual outputs.
been experienced with this thermal model. Tests indicate the
model accuracy to have less than 10% error. Output
interaction with an adjacent output is thought to be the main
contributor to the thermal inaccuracy. Tests indicate little or
no detectable thermal affects caused by distant output
transistors which are isolated by one or more other outputs.
Tests were conducted with the device mounted on a typical
PC board placed horizontally in a 33 cubic inch still air
enclosure. The PC board was made of FR4 material
measuring 2.5 by 2.5 , having double–sided circuit traces of
1.0 oz. copper soldered to each device pin. The board
temperature was measured with thermal couple soldered to
the board surface one inch away from the center of the
16
Each output of the MC33298 incorporates an internal
Characterization of the output clamps, using a single pulse
Logic functions take up a very small area of the die and
The thermal impedance of the package from the internal
The battery voltage in the thermal model represents the
Very satisfactory steady state and transient results have
THERMAL CHARACTERIZATION
MC33298
device. The ambient temperature of the enclosure was
measured with a second thermal couple located over the
center and one inch distant from device.
Thermal Performance
parameters values for the MC33298 in the 20 pin plastic
power DIP and the SOP–24 wide body surface mount
package. The power DIP package has Pins 5, 6, 15, and 16
connected directly to the lead frame flag. The parameter
values indicated take into account adjacent output cell thermal
pulling effects as well as different output combinations. The
characterization was conducted over power dissipation levels
of 0.7 to 17 W. The junction–to–ambient temperature thermal
resistance was found to be 37 C/W with a single output
active (31 C/W with all outputs dissipating equal power) and
in conjunction with this, the thermal resistance from junction
to PC board (R junction–board ) was found to be 27 C/W (board
temperature, measured 1 from device center). In addition,
the thermal resistance from junction–to–heatsink lead was
found to approximate 10 C/W. Devoting additional PC board
metal around the heatsinking pins improved R pkg from 30 to
28 C/W.
20 of the package connected directly to the lead frame flag.
Characterization was conducted in the same manner as for
the DIP package. The junction–to–ambient temperature
resistance was found to be 40 C/W with a single output
active (34 C/W with all outputs dissipating equal power) and
the thermal resistance from junction–to–PC board
(R junction–board ) to be 30 C/W (board temperature,
measured 1 from device center). The junction–to–heatsink
lead resistance was found again to approximate 10 C/W.
Devoting additional PC board metal around the heatsinking
pins for this package improved the R pkg from 33 to 31 C/W.
number of outputs enabled at any one time. At 25 C the
R DS(on) is 450 m with a coefficient of 6500 ppm/ C. For the
junction temperature to remain below 150 C, the maximum
available power dissipation must decrease as the ambient
temperature increases. Figures 21 and 22 depict the per
output limit of current at ambient temperatures necessary for
the plastic DIP and SOP packages respectively when one,
four, or eight outputs are enabled “on.” Figure 23 depicts how
the R DS(on) output value is affected by junction temperature.
Drain–to–Source “On”
Voltage (V DS(ON) )
Figure 20 shows the worst case thermal component
The SOP–24 package has Pins 5, 6, 7, 8, 17, 18, 19, and
The total power dissipation available is dependent on the
Drain–to–Source Clamp
Drain Current
(I D = 0.5 A)
Voltage (V CL = 65 V)
Figure 19. Output Voltage Clamping
Gnd
MOTOROLA ANALOG IC DEVICE DATA
Area (I A )
Current
Drain Voltage
(E J = I A x V CL x t)
Clamp Energy
V PWR
Time