MC3PHAC Motorola, MC3PHAC Datasheet - Page 16

• Manufacturer Part Number: MC3PHAC
• Description: 3-Phase AC Motor Controller
• Manufacturer: Motorola

Freescale Semiconductor, Inc.
MC3PHAC/D
The MC3PHAC allows the voltage boost to be specified as a percentage of full
voltage at 0 Hz, as shown in
Figure
5. In standalone mode, voltage boost is
specified during the initialization phase by supplying a voltage to the MUX_IN
pin while the VBOOST_MODE pin is being driven low. Refer to the graph in
Figure 11
for the resistance value versus voltage boost.
Figure 11
assumes a
6.8 k
pullup resistor. In this way, voltage boost can be specified from 0 to 40
percent, with a scaling factor of 8 percent per volt. In PC master software mode,
the voltage boost can be specified from 0 to 100 percent and can be changed
at anytime.
By using the voltage boost value, and the specified base frequency, the
MC3PHAC has all the information required to generate a voltage profile
automatically based on the generated waveform frequency. An additional
feature exists in PC master software mode whereby this voltage value can be
overridden and controlled in real time. Specifying a voltage lower than the
normal volts-per-hertz profile permits a softer torque response in certain
ergonomic situations. It also allows for load power factor control and higher
operating efficiencies with high inertia loads or other loads where
instantaneous changes in torque demand are not permitted. Details of this
feature are discussed in the
PC Master Software Operation with the
MC3PHAC.
PLL Clock Generation — The OSC1 pin signal is used as a reference clock
for an internal PLL clocking circuit, which is used to drive the internal clocks of
the MC3PHAC. This provides excellent protection against noise spikes that
may occur on the OSC1 pin. In a clocking circuit that does not incorporate a
PLL, a noise spike on the clock input can create a clock edge, which violates
the setup times of the clocking logic, and can cause the device to malfunction.
The same noise spike applied to the input of a PLL clock circuit is perceived by
the PLL as a change in its reference frequency, and the PLL output frequency
begins to change in an attempt to lock on to the new frequency. However,
before any appreciable change can occur, the spike is gone, and the PLL
settles back into the true reference frequency.
Fault Protection — The MC3PHAC supports an elaborate range of fault
protection and prevention features. If a fault does occur, the MC3PHAC
immediately disables the PWMs and waits until the fault condition is cleared
before starting a timer to re-enable the PWMs. Refer to the graph in
Figure 10
for the resistance value versus retry time.
Figure 10
assumes a 6.8 k
pullup
resistor. In standalone mode, this timeout interval is specified during the
initialization phase by supplying a voltage to the MUX_IN pin while the
RETRY_TxD pin is being driven low. In this way, the retry time can be specified
from 1 to 60 seconds, with a scaling factor of 12 seconds per volt. In PC master
software mode, the retry time can be specified from 0.25 second to over
4.5 hours and can be changed at any time.
16
3-Phase AC Motor Controller
MOTOROLA
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