TDF8599 NXP Semiconductors, TDF8599 Datasheet - Page 43

• Manufacturer Part Number: TDF8599
• Description: I2C-bus controlled dual channel 43 W/2 W single channel 85 W/1 W class-D power amplifier
• Manufacturer: NXP Semiconductors

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NXP Semiconductors
TDF8599_1
Product data sheet
Fig 44. Master-slave example application diagram; one BTL master and two BTL slaves
(1) See
(2) See
(3) See
GND
VP
I
enabled.
in I
2
C-bus mode: Single BTL in Master mode with two BTLs in Slave mode; DC offset protection
2
Figure 4 on page 7
Section 8.3.2 on page 9
Section 8.5.5 on page 16
C-bus mode
OUT3N
OUT3P
1000 F
35 V
OUT1N
OUT1P
OUT2P
OUT2N
100 nF
100 nF
22
22
bead
bead
bead
100 nF
100 nF
100 nF
100 nF
22
22
22
22
20 k
Rev. 01 — 13 November 2008
C LC
100 F
35 V
C LC
C LC
C LC
C LC
C LC
470 pF
470 pF
470 pF
470 pF
470 pF
470 pF
470 pF
470 pF
VP1
VP2
VP1
VP2
protection enabled
protection enabled
L LC
L LC
L LC
L LC
L LC
L LC
L LC
L LC
100 F
35 V
for a diagram of the connection for pins EN and SEL_MUTE.
PGND1
PGND2
DC offset
DC offset
VP1
VP2
VPA
10
10
10
10
10
10
10
10
for detailed information.
for detailed information on disabling DC offset protection.
470 pF
470 pF
470 pF
470 pF
470 pF
470 pF
470 pF
470 pF
(3)
(3)
PGND1
PGND2
PGND1
PGND2
100 nF
100 nF
15 nF
15 nF
15 nF
15 nF
15 nF
15 nF
15 nF
15 nF
PGND2
4.7 F
PGND2
4.7 F
PGND1
PGND1
220 nF
220 nF
220 nF
220 nF
VP2
VP2
VP1
VP1
Class-D power amplifier with load diagnostics
GNDD/HW
GNDD/HW
100 nF
100 nF
100 nF
100 nF
BOOT1N
BOOT1P
BOOT2P
BOOT2N
BOOT1N
BOOT1P
BOOT2P
BOOT2N
VSTAB1
VSTAB2
VSTAB1
VSTAB2
PGND2
PGND1
PGND2
PGND1
OUT1N
OUT1P
OUT2P
OUT2N
OUT1N
OUT1P
OUT2P
OUT2N
OSCIO
OSCIO
V
V
DCP
VP2
DCP
VP1
VP2
VP1
DDD
DDD
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
TDF8599
TDF8599
10
11
12
13
14
15
16
17
18
10
11
12
13
14
15
16
17
18
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
IN1P
IN1N
IN2P
IN2N
ACGND
EN
SEL_MUTE
SVRR
AGND
V
ADS
MOD
CLIP
DIAG
SDA
SCL
SSM
OSCSET
IN1P
IN1N
IN2P
IN2N
ACGND
EN
SEL_MUTE
SVRR
AGND
V
ADS
MOD
CLIP
DIAG
SDA
SCL
SSM
OSCSET
DDA
DDA
(1)
(1)
C IN1P
C IN1N
C IN2P
C IN2N
SLAVE MODE
C ACGND
C in
C in
C ACGND
100 nF
100 nF
100 nF
100 nF
Rads
10 k
10 k
100 nF
39 k
Rads
10 k
10 k
bead
33 k
bead
100 k
(1)
(1)
1 F
470 nF
470 nF
470 nF
470 nF
470 nF
470 nF
5.1 k
47 F
47 F
10 nF
470 nF
470 nF
IN1P
IN1N
IN2P
IN2N
VPA
I
address select
stereo mode
setting
VPA
VPA
MASTER
MODE
IN3P
IN3N
VPA
I
address select
parallel mode
setting
VPA
VPA
spread
spectrum
mode
2
2
270 nF
C-bus
C-bus
(2)
TDF8599
© NXP B.V. 2008. All rights reserved.
phase lock
operation
(2)
enable
001aai813
connect
with P
43 of 52