MC74HC390A Motorola, MC74HC390A Datasheet - Page 7

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MC74HC390A

Manufacturer Part Number
MC74HC390A
Description
Dual 4-Stage Binary Ripple Counter
Manufacturer
Motorola
Datasheet

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High–Speed CMOS Logic Data
DL129 — Rev 6
and
(2–5) count sequences. If Output Q A is connected to the
Clock B input (Figure 4), a decade divider with BCD output is
obtained. The function table for the BCD count sequence is
given in Table 1.
5 counters can be connected to give BCD or bi–quinary
Each half of the MC54/74HC390A has independent
CLOCK A
CLOCK B
* Q A connected to Clock B input.
5 sections (except for the Reset function). The
RESET
Count
Count
0
1
2
3
4
5
6
7
8
9
Table 1. BCD Count Sequence*
Figure 4. BCD Count
1, 15
4, 12
2, 14
Q D
H
H
L
L
L
L
L
L
L
L
COUNTER
COUNTER
Q C
H
H
H
H
L
L
L
L
L
L
2
5
Output
Q B
H
H
H
H
L
L
L
L
L
L
3, 13
6, 10
5, 11
7, 9
APPLICATIONS INFORMATION
CONNECTION DIAGRAMS
Q A
Q B
Q C
Q A
Q D
H
H
H
H
H
L
L
L
L
L
2 and
2
7
connected to the Clock B input, and output Q D is connected
to the Clock A input (Figure 5). Q A provides a 50% duty cycle
output. The bi–quinary count sequence function table is
given in Table 2.
To obtain a bi–quinary count sequence, the input signals
** Q D connected to Clock A input.
CLOCK A
CLOCK B
Count
Count
Table 2. Bi–Quinary Count Sequence**
RESET
10
12
11
0
1
2
3
4
8
9
4, 12
2, 14
Figure 5. Bi-Quinary Count
Q A
H
H
H
H
H
L
L
L
L
L
1, 15
COUNTER
COUNTER
Q D
H
H
L
L
L
L
L
L
L
L
Output
2
5
MC54/74HC390A
Q C
H
H
H
H
L
L
L
L
L
L
3, 13
6, 10
5, 11
7, 9
Q B
MOTOROLA
H
H
H
H
L
L
L
L
L
L
Q A
Q B
Q C
Q D

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