LMX2370 National Semiconductor, LMX2370 Datasheet - Page 5

• Manufacturer Part Number: LMX2370
• Description: PLLatinum Dual Frequency Synthesizer for RF Personal Communications
• Manufacturer: National Semiconductor

CHARGE PUMP
ICP
ICP
ICP
ICP
ICP
ICP
ICP
ICP
VCP
ICP
DIGITAL INTERFACE (DATA, CLOCK, LE)
V
V
I
I
V
MICROWIRE TIMING
t
t
t
t
t
t
IH
IL
CS
CH
CWH
CWL
ES
EW
IH
IL
OL
Electrical Characteristics
Note 4: Main and Auxiliary Charge Pump magnitude are controlled by Main_ICP
Note 5: Lock Detect open drain output only pulled up to V
Symbol
Symbol
Symbol
1.0 Functional Description
The basic phase-lock-loop (PLL) configuration consists of a high-stability crystal reference oscillator, a frequency synthesizer
such as the National Semiconductor LMX2370/2371/2372, a voltage controlled oscillator (VCO), and a passive loop filter. The fre-
quency synthesizer includes a phase detector, a current mode charge pump, as well as programmable reference [R] and feed-
back [N] frequency dividers. The VCO frequency is established by dividing the crystal reference signal down via the R-counter to
obtain a comparison reference frequency. This reference signal ( f
and compared with the feedback signal ( f
phase/frequency detector’s current source output pumps charge into the loop filter, which then integrates into the VCO’s control
voltage. The function of the phase/frequency comparator is to adjust the control voltage presented to the VCO until the feedback
signal frequency and phase match that of the reference signal. When this “Phase-Locked” condition exists, the VCO frequency
will be N times that of the comparison frequency, where N is the integer divide ratio.
1.1 REFERENCE OSCILLATOR INPUT
The reference oscillator frequency for the Main and Auxiliary PLLs is provided from the external reference through the OSC
OSC
R-counter. The input has a V
is connected to the output of a crystal oscillator.
1.2 REFERENCE DIVIDERS (R-COUNTERS)
The Main and Auxiliary R-counters are both clocked through the oscillator block in common. The maximum frequency is 50 MHz.
Both R-counters are CMOS design and 15-bit in length with programmable divider ratio from 2 to 32,767.
o-source
o-sink
o-source
o-sink
o-TRI
o-sink
o-source
o
o
o
vs
vs T
in
can operate up to 50 MHz with input sensitivity of 0.5 V
vs
A
Main and Auxiliary Charge
Pump Output Current (Note 4)
Charge Pump TRI-STATE
Current
CP Sink vs Source Mismatch
CP Current vs Voltage
CP Current vs Temperature
High-Level Input Voltage
Low-Level Input Voltage
High-Level Input Current
Low-Level Input Current
Low-Level Output Current
Data to Clock Setup Time
Data to Clock Hold Time
Clock Pulse Width High
Clock Pulse Width Low
Clock to Load Enable Setup
Time
Load Enable Pulse Width
Parameter
Parameter
Parameter
CC
/2 input threshold that can be driven from an external CMOS or TTL logic gate. Typically, the OSC
®
N
), which is obtained by dividing the VCO frequency down by way of the N-counter. The
(V
CC
EXT
VCP
VCP
VCP
VCP
0.5
−40˚C
VCP
0.5
VCP
Vµc = 1.72V to 5.5V
Vµc = 1.72V to 5.5V
V
V
I
5)
See Data Input Timing
See Data Input Timing
See Data Input Timing
See Data Input Timing
See Data Input Timing
See Data Input Timing
OL
= Vp = Vµc = 3.0V; −40˚C
IH
IL
. Typically V
= 0, Vµc = 5.5V
= 1.0 mA, V
= Vµc = 5.5V
o
o
o
o
o
o
VCP
VCP
= Vp/2, ICP
= Vp/2, ICP
= Vp/2, ICP
= Vp/2, ICP
= Vp/2, T
= Vp/2, −40˚C
<
T
o
o
A
EXT
Conditions
Conditions
Conditions
<
PP
Vp − 0.5,
Vp − 0.5, T
= V
85˚C
5
A
EXT
. The OSC
o
_4X and Aux_ICP
CC
R
= 25˚C
o
o
o
o
) is then presented to the input of a phase/frequency detector
_4X = 0
_4X = 0
_4X = 1
_4X = 1
.
= 1.8V (Note
<
T
A
A
in
<
= 25˚C
pin drives both the Main R-counter and the Auxiliary
<
85˚C
o
T
_4X bits respectively.
A
<
85˚C except as specified). (Continued)
0.8 Vµc
−2.5
−1.0
−1.0
Min
Min
Min
50
20
50
50
50
50
Value
Value
Value
−1.0
−4.0
Typ
Typ
Typ
1.0
4.0
0.1
0.1
3
8
8
0.2 Vµc
Max
Max
Max
2.5
1.0
1.0
0.4
10
15
www.national.com
in
Unit
Unit
Unit
pin.
mA
mA
mA
mA
nA
µA
µA
ns
ns
ns
ns
ns
ns
%
%
%
V
V
V
in