HT45RM03 Holtek Semiconductor, HT45RM03 Datasheet - Page 9

• Manufacturer Part Number: HT45RM03
• Description: Brushless DC Motor Type 8-Bit OTP MCU
• Manufacturer: Holtek Semiconductor

Indirect Addressing Register
The method of indirect addressing allows data manipu-
lation using memory pointers instead of the usual direct
memory addressing method where the actual memory
address is defined. Any action on the indirect address-
ing registers will result in corresponding read/write oper-
ations to the memory location specified by the
corresponding memory pointers. This device contains
two indirect addressing registers known as IAR0 and
IAR1 and two memory pointers MP0 and MP1. Note that
these indirect addressing registers are not physically
implemented and that reading the indirect addressing
registers indirectly will return a result of 00H and writ-
ing to the registers indirectly will result in no operation.
The two memory pointers, MP0 and MP1, are physically
implemented in the data memory and can be manipu-
lated in the same way as normal registers providing a
convenient way with which to address and track data.
When any operation to the relevant indirect addressing
registers is carried out, the actual address that the
microcontroller is directed to is the address specified by
the related memory pointer.
Direct data transfer between two indirect addressing
registers is not supported. The memory pointer regis-
ters, MP0 and MP1, are both 8-bit registers used to ac-
cess the Program Memory by combining corresponding
indirect addressing registers.
Accumulator
The accumulator is closely related to ALU operations. It
is also mapped to location 05H of the data memory and
can carry out immediate data operations. The data
movement between two data memory locations must
pass through the accumulator.
Rev. 1.00
Bit No.
6~7
0
1
2
3
4
5
Label
PDF
OV
AC
TO
C
Z
C is set if the operation results in a carry during an addition operation or if a borrow does not
take place during a subtraction operation; otherwise C is cleared. C is also affected by a ro-
tate through carry instruction.
AC is set if the operation results in a carry out of the low nibbles in addition or no borrow from
the high nibble into the low nibble in subtraction; otherwise AC is cleared.
Z is set if the result of an arithmetic or logic operation is zero; otherwise Z is cleared.
OV is set if the operation results in a carry into the highest-order bit but not a carry out of the
highest-order bit, or vice versa; otherwise OV is cleared.
PDF is cleared by system power-up or executing the CLR WDT instruction.
PDF is set by executing the HALT instruction.
TO is cleared by system power-up or executing the CLR WDT or HALT instruction.
TO is set by a WDT time-out.
Unused bit, read as 0
Status (0AH) Register
9
Arithmetic and Logic Unit - ALU
This circuit performs 8-bit arithmetic and logic operations.
The ALU provides the following functions:
The ALU not only saves the results of a data operation but
also changes the status register.
Status Register - STATUS
This 8-bit register (0AH) contains the zero flag (Z), carry
flag (C), auxiliary carry flag (AC), overflow flag (OV),
power down flag (PDF), and watchdog time-out flag
(TO). It also records the status information and controls
the operation sequence.
With the exception of the TO and PDF flags, bits in
the status register can be altered by instructions like
most other registers. Any data written into the status
register will not change the TO or PDF flag. In addi-
tion operations related to the status register may give
different results from those intended. The TO flag
can be affected only by system power-up, a WDT
time-out or executing the CLR WDT or HALT in-
struction. The PDF flag can be affected only by exe-
cuting the HALT or CLR WDT instruction or a
system power-up.
The Z, OV, AC and C flags generally reflect the status of
the latest operations.
In addition, on entering the interrupt sequence or exe-
cuting the subroutine call, the status register will not be
pushed onto the stack automatically. If the contents of
the status are important and if the subroutine can cor-
rupt the status register, precautions must be taken to
save it properly.
Arithmetic operations (ADD, ADC, SUB, SBC, DAA)
Logic operations (AND, OR, XOR, CPL)
Rotation (RL, RR, RLC, RRC)
Increment and Decrement (INC, DEC)
Branch decision (SZ, SNZ, SIZ, SDZ ....)
Function
HT45RM03
January 11, 2007