HT46C47 Holtek Semiconductor, HT46C47 Datasheet - Page 20

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HT46C47

Manufacturer Part Number
HT46C47
Description
(HT46C46 / HT46C47) Cost-Effective A/D Type 8-Bit MCU
Manufacturer
Holtek Semiconductor
Datasheet

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The following two programming examples illustrate how to setup and implement an A/D conversion. In the first exam-
ple, the method of polling the EOCB bit in the ADCR register is used to detect when the conversion cycle is complete,
whereas in the second example, the A/D interrupt is used to determine when the conversion is complete.
Example: using EOCB Polling Method to detect end of conversion
Start_conversion:
Polling_EOC:
Example: using Interrupt method to detect end of conversion
start_conversion:
; interrupt service routine
EOC_service routine:
Rev. 1.00
clr INTC.3
mov a,00100000B
mov ADCR,a
mov a,00000001B
mov ACSR,a
clr ADCR.7
set ADCR.7
clr ADCR.7
sz ADCR.6
jmp polling_EOC
mov a,ADR
mov adr_buffer,a
jmp start_conversion
set INTC.0
set INTC.3
mov a,00100000B
mov ADCR,a
mov a,00000001B
mov ACSR,a
clr ADCR.7
set ADCR.7
clr ADCR.7
mov a_buffer,a
mov a,ADR
mov adr_buffer,a
clr ADCR.7
set ADCR.7
clr ADCR.7
mov a,a_buffer
reti
:
:
:
:
; disable A/D interrupt in interrupt control register
; setup ADCR register to configure Port PB0~PB3 as A/D inputs and select
; AN0 to be connected to the A/D converter
; setup the ACSR register to select f
; reset A/D
; start A/D
; poll the ADCR register EOCB bit to detect end of A/D conversion
; continue polling
; read conversion result from the ADR (HT46R46/HT46C46) or
; ADRH, ADRL (HT46R47/HT46C47) register
; save result to user defined register
; start next A/D conversion
; interrupt global enable
; enable A/D interrupt in interrupt control register
; setup ADCR register to configure Port PB0~PB3 as A/D inputs and select
; AN0 to be connected to the A/D converter
; setup the ACSR register to select f
; reset A/D
; start A/D
; save ACC to user defined register
; read conversion result from the ADR (HT46R46/HT46C46) or
; ADRH, ADRL (HT46R47/HT46C47) register
; save result to user defined register
; reset A/D
; start A/D
; restore ACC from temporary storage
HT46R46/HT46C46/HT46R47/HT46C47
20
SYS
SYS
/8 as the A/D clock
/8 as the A/D clock
December 28, 2004

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