HT46R52A Holtek Semiconductor, HT46R52A Datasheet - Page 19

• Manufacturer Part Number: HT46R52A
• Description: (HT46R51A / HT46R52A) A/D Type 8-Bit OTP MCU
• Manufacturer: Holtek Semiconductor

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Example: using Interrupt Method to detect end of conversion
Start_conversion:
; ADC interrupt service routine
ADC_ISR:
EXIT_INT_ISR:
Low Voltage Reset - LVR
There is a low voltage reset circuit (LVR) implemented in
the microcontrollers. The function can be enabled/dis-
abled by options.
If the supply voltage of the device is within the range
0.9V~V
tomatically reset the device internally.
The LVR includes the following specifications:
Rev. 1.00
The low voltage (0.9V~V
original state to exceed 1ms. If the low voltage state
does not exceed 1ms, the LVR will ignore it and do not
perform a reset function.
The LVR uses the OR function with the external RES
signal to perform chip reset.
jmp
clr
mov
mov
mov
mov
clr
set
clr
clr
set
set
mov
mov
mov
mov
mov
mov
mov
clr
set
clr
mov
mov
mov
reti
LVR
such as changing a battery, the LVR will au-
:
:
Start_conversion
EADI
a,00000001B
ACSR,a
a,00100000B
ADCR,a
:
:
START
START
START
ADF
EADI
EMI
:
:
:
acc_stack,a
a,STATUS
status_stack,a
:
:
a,ADRH
adrh_buffer,a
a,ADRL
adrl_buffer,a
START
START
START
:
:
a,status_stack
STATUS,a
a,acc_stack
LVR
) has to remain in their
; start next A/D conversion
; disable ADC interrupt
; setup the ACSR register to select f
; setup ADCR register to configure Port PB0~PB3 as A/D inputs
; and select AN0 to be connected to the A/D converter
; reset A/D
; start A/D
; clear ADC interrupt request flag
; enable ADC interrupt
; enable global interrupt
; save ACC to user defined memory
; save STATUS to user defined memory
; read conversion result high byte value from the ADRH register
; save result to user defined register
; read conversion result low byte value from the ADRL register
; save result to user defined register
; reset A/D
; start A/D
; restore STATUS from user defined memory
; restore ACC from user defined memory
; As the Port B channel bits have changed the following START
; signal (0-1-0) must be issued within 10 instruction cycles
19
The relationship between V
Note: V
operation at 4MHz system clock.
OPR
SYS
is the voltage range for proper chip
/8 as the A/D clock
HT46R51A/HT46R52A
DD
and V
LVR
is shown below.
August 24, 2006