HT47C20 Holtek Semiconductor Inc, HT47C20 Datasheet - Page 17

• Manufacturer Part Number: HT47C20
• Description: 8-Bit Microcontroller
• Manufacturer: Holtek Semiconductor Inc

methods are adopted, external reset (a low level
to RES), software instruction, or a HALT instruc-
tion. The software instructions are of two types
which include CLR WDT and the other set - CLR
WDT1 and CLR WDT2. Of these two types of in-
struction, only one can be active depending on
the mask option - ²CLR WDT times selection op-
tion². If the ²CLR WDT² is selected (i.e., CLR
WDT times equal one), any execution of the CLR
WDT instruction will clear the WDT. In case ²CLR
WDT1² and ²CLR WDT2² are chosen (i.e. CLR
WDT times equal two), these two instructions
must be executed to clear the WDT; otherwise,
the WDT may reset the chip because of
time-out.
The WDT time-out period ranges from
f
WDT1² and ²CLRWDT2² instruction only clear
the last two-stage of the WDT.
Multi-function timer
The HT47C20 provides a multi-function timer
for WDT, time base and real time clock but with
different time-out periods. The multi-function
timer consists of a 7-stage divider and an 8-bit
prescaler, with the clock source coming from
s/2
15
~f
s/2
16
. Because the ²CLR WDT² or ²CLR
Watchdog timer
Time base
17
WDT OSC or RTC OSC or the instruction clock
(i .e ., s ys tem cl ock di vi ded by 4). T he
multi-function timer also provides a selectable
frequency signal (ranges from f
LCD driver circuits, and a selectable frequency
signal (ranges from f
put by mask option. It is recommended to select
a near 4kHz signal for LCD driver circuits for
proper display.
Time base
The time base offers a periodic time-out period
to generate a regular internal interrupt. Its
time-out period ranges from f
lected by mask option. If time base time-out oc-
curs, the related interrupt request flag (TBF;
bit 5 of INTC0) is set. But if the interrupt is en-
abled, and the stack is not full, a subroutine call
to location 08H occurs.
When the HALT instruction is executed, the
time base still works (if WDT clock source co-
mes from WDT RC OSC or RTC OSC) and can
wake up from halt mode.
If the TBF is set ²1² before entering the halt
mode, the wake up function will be disable.
s
/2
2
to f
s
/2
s
9
/2
) for buzzer out-
January 18, 2000
s
/2
12
2
HT47C20
to f
to f
s
s
/2
/2
15
8
) for
se-