HT47C20 Holtek Semiconductor Inc, HT47C20 Datasheet - Page 21

• Manufacturer Part Number: HT47C20
• Description: 8-Bit Microcontroller
• Manufacturer: Holtek Semiconductor Inc

Timer/event counter
One 16-bit timer/event counter with PFD output
or two channels of RC type A/D converter is im-
plemented in the HT47C20. The ADC/TM bit
(bit 1 of ADCR register) decides whether timer A
and timer B is composed of one 16-bit
timer/event counter or timer A and timer B com-
posedoftwochannelsRCtypeA/Dconverter.
The TMRAL, TMRAH, TMRBL, TMRBH com-
pose one 16-bit timer/event counter, when
ADC/TM bit is ²0². The TMRBL and TMRBH
are timer/event counter preload registers for
lower-order byte and higher-order byte respec-
tively.
Using the internal clock, there are three refer-
ence time-base. The timer/event counter clock
source may come from the system clock or sys-
tem clock/4 or RTC time-out signal or external
source.
The external clock input allows the user to count
external events, count external RC type A/D
clock, measure time intervals or pulse widths, or
generate an accurate time base.
There are six registers related to the timer/event
counter operating mode. TMRAH ([20H]),
TMRAL ([21H]), TMRC ([22H]), TMRBH ([23H]),
TMRBL ([24H]) and ADCR ([25H]). Writing
TMRBL only writes the data into a low byte
buffer, and writing TMRBH will write the data
and the contents of the low byte buffer into the
time/event counter preload register (16-bit) si-
multaneously. The timer/event counter preload
register is changed by writing TMRBH opera-
tions and writing TMRBL will keep the
timer/event counter preload register unchanged.
Timer/event counter
21
Reading TMRAH will also latch the TMRAL
into the low byte buffer to avoid the false timing
problem. Reading TMRAL returns the contents
of the low byte buffer. In other words, the low
byte of the timer/event counter can not be read
directly. It must read the TMRAH first to make
the low byte contents of the timer/event counter
be latched into the buffer.
The TMRC is the timer/event counter control
register, which defines the timer/event counter
options.
The timer/event counter control register de-
fines the operating mode, counting enable or
disable and active edge.
Writing to timer B makes the starting value be
placed in the timer/event counter preload regis-
ter, while reading timer A yields the contents of
the timer/event counter. Timer B is timer/event
counter preload register.
The TN0, TN1 and TN2 bits define the opera-
tion mode. The event count mode is used to
count external events, which means that the
clock source comes from an external (TMR) pin.
The A/D clock mode is used to count external
A/D clock, the RC oscillation mode is decided by
ADCR register. The timer mode functions as a
normal timer with the clock source coming from
the internal selected clock source. Finally, the
pulse width measurement mode can be used to
count the high or low level duration of the ex-
ternal signal (TMR). The counting is based on
the instruction clock.
In the event count, A/D clock or internal timer
mode, once the timer/event counter starts
counting, it will count from the current con-
January 18, 2000
HT47C20