HT48CA3 Holtek Semiconductor Inc, HT48CA3 Datasheet - Page 27

• Manufacturer Part Number: HT48CA3
• Description: 8-Bit Remote Type MCU
• Manufacturer: Holtek Semiconductor Inc

RRCA [m]
Description
Operation
Affected flag(s)
SBC A,[m]
Description
Operation
Affected flag(s)
SBCM A,[m]
Description
Operation
Affected flag(s)
SDZ [m]
Description
Operation
Affected flag(s)
SDZA [m]
Description
Operation
Affected flag(s)
Rev. 1.40
Rotate right through carry and place result in the accumulator
Data of the specified data memory and the carry flag are rotated 1 bit right. Bit 0 replaces
the carry bit and the original carry flag is rotated into the bit 7 position. The rotated result is
stored in the accumulator. The contents of the data memory remain unchanged.
ACC.i
ACC.7
C
Subtract data memory and carry from the accumulator
The contents of the specified data memory and the complement of the carry flag are sub-
tracted from the accumulator, leaving the result in the accumulator.
ACC
Subtract data memory and carry from the accumulator
The contents of the specified data memory and the complement of the carry flag are sub-
tracted from the accumulator, leaving the result in the data memory.
[m]
Skip if decrement data memory is 0
The contents of the specified data memory are decremented by 1. If the result is 0, the next
instruction is skipped. If the result is 0, the following instruction, fetched during the current
instruction execution, is discarded and a dummy cycle is replaced to get the proper instruc-
tion (2 cycles). Otherwise proceed with the next instruction (1 cycle).
Skip if ([m] 1)=0, [m]
Decrement data memory and place result in ACC, skip if 0
The contents of the specified data memory are decremented by 1. If the result is 0, the next
instruction is skipped. The result is stored in the accumulator but the data memory remains
unchanged. If the result is 0, the following instruction, fetched during the current instruction
execution, is discarded and a dummy cycle is replaced to get the proper instruction (2 cy-
cles). Otherwise proceed with the next instruction (1 cycle).
Skip if ([m] 1)=0, ACC
TC2
TC2
TC2
TC2
TC2
[m].0
ACC+[m]+C
ACC+[m]+C
TC1
TC1
TC1
TC1
TC1
[m].(i+1); [m].i:bit i of the data memory (i=0~6)
C
TO
TO
TO
TO
TO
([m] 1)
PD
PD
PD
PD
PD
([m] 1)
27
OV
OV
OV
OV
OV
Z
Z
Z
Z
Z
AC
AC
AC
AC
AC
C
C
C
C
C
HT48CA3
July 16, 2003