HT48R03 Holtek Semiconductor, HT48R03 Datasheet - Page 17

• Manufacturer Part Number: HT48R03
• Description: (HT48R01 - HT48R03) 10-Pin MSOP I/O Type 8-Bit OTP MCU
• Manufacturer: Holtek Semiconductor

In the case of timer/event counter OFF condition, writing
data to the timer/event counter preload register will also
reload that data to the timer/event counter. But if the
timer/event counter is turned on, data written to it will
only be kept in the timer/event counter preload register.
The timer/event counter will still operate until overflow
occurs. When the timer/event counter is read, the clock
will be blocked to avoid errors. As clock blocking may re-
Rev. 1.00
Bit No.
Bit No.
0~2
0~2
3
4
5
6
7
3
4
5
6
7
T0PSC0~
T0PSC2
Label
T0ON
Label
T1ON
T0M0
T0M1
T1M0
T1M1
T0E
T0S
T1E
T1S
To define the prescaler stages, T0PSC2, T0PSC1, T0PSC0=
000: f
001: f
010: f
011: f
100: f
101: f
110: f
111: f
To define the TMR active edge of the timer/event counter
In event counter mode (T0M1,T0M0)=(0,1):
1: count on falling edge
0: count on rising edge
In pulse width measurement mode (T0M1,T0M0)=(1,1):
1: start counting on rising edge, stop on falling edge
0: start counting on falling edge, stop on rising edge
To enable or disable timer counting (0=disabled; 1=enabled)
Timer clock source selection
0: f
1: RTC
To define the operating mode (T0M1, T0M0)
01=Event count mode (external clock)
10=Timer mode (internal clock)
11=Pulse width measurement mode
00=Unused
Unused bit, read as 0
To define the TMR active edge of the timer/event counter
In event counter mode (T1M1,T1M0)=(0,1):
1: count on falling edge
0: count on rising edge
In pulse width measurement mode (T1M1,T1M0)=(1,1):
1: start counting on rising edge, stop on falling edge
0: start counting on falling edge, stop on rising edge
To enable or disable timer counting (0=disabled; 1=enabled)
Timer clock source selection
0: f
1: RTC
To define the operating mode (T1M1, T1M0)
01=Event count mode (external clock)
10=Timer mode (internal clock)
11=Pulse width measurement mode
00=Unused
SYS
SYS
INT
INT
INT
INT
INT
INT
INT
INT
/4
=f
=f
=f
=f
=f
=f
=f
=f
TP
TP
TP
TP
TP
TP
TP
TP
/2
/4
/8
/16
/32
/64
/128
TMR0C (0EH) Register
TMR1C (11H) Register
17
sults in a counting error, this must be taken into consid-
eration by the programmer.
The bit 0~2 of the TMR0C can be used to define the
pre-scaling stages of the internal clock sources of the
timer/event counter. The definitions are as shown. The
timer/event counter overflow signals can be used to
generate signals for the buzzer.
Function
Function
HT48R01/HT48R02/HT48R03
December 20, 2006