HT48R03 Holtek Semiconductor, HT48R03 Datasheet - Page 7

• Manufacturer Part Number: HT48R03
• Description: (HT48R01 - HT48R03) 10-Pin MSOP I/O Type 8-Bit OTP MCU
• Manufacturer: Holtek Semiconductor

Program Memory - ROM
The program memory is used to store the program in-
structions which are to be executed. It also contains
data, table, and interrupt entries, and is organized into
1024 14 bits for the HT48R01, 2048 14 bits for the
HT48R02 or 4096 15 bits for the HT48R03, addressed
by the program counter and table pointer.
Certain locations in the program memory are reserved
for special usage:
Note: *11~*0: Table location bits
Rev. 1.00
TABRDC [m]
TABRDL [m]
Location 000H
This area is reserved for program initialization. After
chip reset, the program always begins execution at lo-
cation 000H.
Location 004H
This area is reserved for the external interrupt service
program. If the INT input pin is activated, the interrupt
is enabled and the stack is not full, the program begins
execution at location 004H.
Instruction
@7~@0: Table pointer bits
For the HT48R01, the table address location is 10 bits, i.e. from *9~*0
For the HT48R02, the table address location is 11 bits, i.e. from *10~*0
For the HT48R03, the table address location is 12 bits, i.e. from *11~*0
P11
*11
1
P10
*10
1
P9
*9
1
P8
*8
1
Program Memory
Table Location
@7
@7
*7
7
Table Location
@6
@6
*6
P11~P8: Current program counter bits
Location 008H
This location is reserved for the Timer/Event Counter
0 interrupt service program. If a timer interrupt results
from a Timer/Event Counter 0 overflow, and the inter-
rupt is enabled and the stack is not full, the program
begins execution at location 008H.
Location 00CH (HT48R02/HT48R03 only)
This location is reserved for the Timer/Event Counter
1 interrupt service program. If a timer interrupt results
from a Timer/Event Counter 1 overflow, and the inter-
rupt is enabled and the stack is not full, the program
begins execution at location 00CH.
Table location
Any location in the program memory can be used as
look-up tables. The instructions TABRDC [m] (the
current page) and TABRDL [m] (the last page) trans-
fer the contents of the lower-order byte to the speci-
fied data memory, and the higher-order byte to TBLH
(08H). Only the destination of the lower-order byte in
the table is well-defined, the other bits of the table
@5
@5
*5
HT48R01/HT48R02/HT48R03
@4
@4
*4
@3
@3
*3
@2
@2
*2
December 20, 2006
@1
@1
*1
@0
@0
*0