ST486DX ST Microelectronics, ST486DX Datasheet - Page 14

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ST486DX

Manufacturer Part Number
ST486DX
Description
PROGRAMMING MANUAL
Manufacturer
ST Microelectronics
Datasheet
ST486DX - SMM SOFTWARE CONSIDERATIONS
3.2
At the beginning of the SMM routine, before control is transferred to code executing at the SMM
base, certain portions of the CPU state are saved at the top of SMM memory. To optimize the
speed of SMM entry and exit, the CPU saves the minimum CPU state information necessary for an
SMI interrupt handler to execute and return to the interrupted context. The information is saved to
the SMM header at the top of the defined SMM region (starting at SMM base + size - 30h) as
shown in Figure-3-1. Of the typically used program registers only the CS, IP, EFLAGS, CR0, and
DR7 are saved upon entry to SMM. This requires that data accesses use a CS segment override to
24
; this line copies the SMM routine from DS:ESI to ES:EDI
; now disable SMI by clearing SMAC and SMI
SMM Handler Entry State
out
mov
out
mov
out
in
mov
mov
out
mov
or
out
mov
mov
mov
mov
mov
mov
mov
rep
movs dword ptr es:[edi],dword ptr ds:[esi]
mov
out
mov
and
out
22h, al
al, 083h
23h, al
al, 0c1h
22h, al
al, 23h
ah,
al, 0c1h
22h, al
al, ah
al, SMI or SMAC; set SMI and SMAC
23h, al
ax, SMMBASE shr 4
es, ax
edi, 0
esi, offset SMI_ROUTINE
ax, seg SMI_ROUTINE
ds, ax
ecx, (SMI_ROUTINE_LENGTH+3)/4
al, 0c1h
22h, al
al, ah
al, NOT SMAC
23h, al
al
;disable SMAC, enable SMI#
;select
;set SMM lower addr. 80h, 16K
;write value
;index to CCR1
;select CCR1 register
;read current CCR1 value
;save it
;index to CCR1
;select CCR1 register
;new value now in CCR1, SMM now
;mapped in
;es:di = start of the SMM area
;index to CCR1
;select CCR1 register
;AH is still old value
;write new value to CCR
;routine in main memory
;start of copy of SMM
;calc. length

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