ST486DX ST Microelectronics, ST486DX Datasheet - Page 18

• Manufacturer Part Number: ST486DX
• Description: PROGRAMMING MANUAL
• Manufacturer: ST Microelectronics

ST486DX - SMM SOFTWARE CONSIDERATIONS
3.3
The following registers are not automatically saved/restored on SMM entry/exit.
If any of these registers need to be used by the SMM routine, the registers need to be saved after en-
try to the SMM routine and then restored prior to exit from SMM. Additionally, if power is to be
removed from the CPU and the system is required to return to the same system state after power is
reapplied, then the entire CPU state must be saved to a non-volatile memory subsystem such as a
hard disk.
3.3.1
The following is an example of the instructions needed to save the entire CPU state and restore it.
This code sequence will work from real mode if the conditions needed to execute SGS-Thomson
SMM instructions are met (see Section 2.3).
28
General Purpose Registers:
Pointer and Index Registers:
Selector/Segment Registers:
Descriptor Table Registers:
Control Registers:
Debug Registers:
Configuration Registers:
FPU Registers:
; Save and Restore the common CPU registers.
; The information automatically saved in the
; header on entry to SMM is not saved again.
include SMIMAC.INC
Maintaining the CPU State
Maintaining Common CPU Registers
.386P
mov
mov
mov
mov
mov
mov
mov
mov
svdc
svdc
svdc
svdc
svdc
svldt cs:,save_ldt
cs:save_eax,eax
cs:save_ebx,ebx
cs:save_ecx,ecx
cs:save_edx,edx
cs:save_esi,esi
cs:save_edi,edi
cs:save_ebp,ebp
cs:save_esp,esp
cs:,save_ds,ds
cs:,save_es,es
cs:,save_fs,fs
cs:,save_gs,gs
cs:,save_ss,ss
;required for SMIMAC.INC macro
EAX, EBX, ECX, EDX
EBP, ESI, EDI, ESP
DS, ES, SS, FS, GS
GDTR, IDTR, LDTR, TR
CR2, CR3
DR0, DR1, DR2, DR3, DR6
CCR1, CCR2, CCR3, SMAR
Entire FPU state.
;sldt is not valid in real mode