LM1253AN National Semiconductor, LM1253AN Datasheet - Page 43

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LM1253AN

Manufacturer Part Number
LM1253AN
Description
Monolithic Triple 180 MHz I2C CRT Pre-amp With Integrated Analog On Screen Display (OSD) Generator
Manufacturer
National Semiconductor
Datasheet
Control Register Definitions
Display Window 2 Horizontal Pixel Start Location Register (I
REGISTER NAME: HSTRT2 (8418h)
Bit 7
Bits 7–0: Display Window 2 Horizontal Pixel Start Location. These seven bits determine the starting horizontal pixel location,
Display Window 2 Vertical Pixel Start Location Register (I
REGISTER NAME: VSTRT2 (8419h)
Bit 7
Bits 7–0: Display Window 2 Vertical Pixel Start Location. These eight bits determine the starting vertical pixel location in con-
Display Window 2 Starting Address in the Display Page RAM (I
REGISTER NAME: W2STRTADRH (841Bh) W2STRTADRL (841Ah)
Bit 15
Bits 8–0: Display Window 2’s Starting Address in the Display Page RAM. This register determines the starting address of Dis-
Bits 7–5: RESERVED.
Display Window 2 Column Width Control Register (I
REGISTER NAME: COLWIDTH2B3 (841Fh) COLWIDTH2B2 (841Eh) COLWIDTH2B1 (841Dh) COLWIDTH2B0 (841Ch)
Bit 31
Bit 15
Bits 31–0: Display Window 2 Column Width 2x Enable Bits. These thirty-two bits correspond to columns 31–0 of Display Win-
COL31
COL15
2H7
2V7
RSV
COL30
COL14
2H6
2V6
RSV
which is determined by multiplying the value of these bits by 4 and adding 30 pixels. Due to pipeline delays, the first
usable location for the OSD window is approx 42 pixels to the right of the horizontal flyback pulse. For this reason, the
display start location must be programmed with a number larger than 2, otherwise improper operation may occur.
This byte must be set so the entire OSD window is within the active video.
stant height character lines, which is determined by multiplying the value of these bits by 2. (Note, each character line
is treated as a single auto-height character pixel line, so multiple scan lines may actually be displayed in order to main-
tain accurate position relative to the character cell size — see Constant Character Height Mechanism section).
This byte must be set so the entire OSD window is within the active video.
play Window 2 in the Display Page RAM. This first address location will always contain the SL code for the first row
of Display Window 2.
dow 2, respectively. A value of zero indicates the column will have normal width (12 pixels). A value of one indicates
the column will be twice as wide as normal (24 pixels). For the double wide case, each Character Font pixel location
will be displayed twice, in two consecutive horizontal pixel locations.
The user should note that if more than 32 display characters are programmed to reside on a row, then all display
characters after the first thirty-two will have normal width (12 pixels).
2H5
2V5
COL29
COL13
RSV
2H4
2V4
COL28
COL12
RSV
2H3
2V3
COL27
COL11
RSV
2H2
2V2
COL26 COL25 COL24 COL23 COL22 COL21 COL20 COL19 COL18 COL17 COL16
COL10
RSV
2H1
2V1
(Continued)
COL9
RSV
2
2H0
2V0
Bit 0
Bit 0
C address 841Ch–841Fh).
Bit 24
COL8
2ad8
Bit 8
Bit 8
2
C address 8419h).
43
2
C address 8418h).
Bit 7
Bit 23
Bit 7
COL7
2ad7
2
C address 841Ah–841Bh).
COL6
2ad6
COL5
2ad5
COL4
2ad4
COL3
2ad3
COL2
2ad2
COL1
2ad1
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COL0
2ad0
Bit 16
Bit 0
Bit 0

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