PDSP16515AA0AC Mitel Networks Corporation, PDSP16515AA0AC Datasheet - Page 23

• Manufacturer Part Number: PDSP16515AA0AC
• Description: Stand Alone FFT Processor
• Manufacturer: Mitel Networks Corporation

DOS can now be switched on for at least one pulse (but may
be more), and the sequence of events as described earlier
(from point No 3.3) will start. DEN can then be made active,
whereby a further 4 DEN-Enabled DOS pulses will be required
before data is seen on the output pins. This is the situation
shown in table 3.
Alternatively, DEN and DOS could be made to operate on the
same cycle. In this case data will appear on the output pins on
the 5th DOS pulse (the first would not actually require the
presence of DEN, but the 2nd, 3rd, 4th and 5th would)
(4.3) 1024 point transforms, single device mode.
In the case of 1024 point transforms, the internal RAM is no
longer operated in the manner described in section 2. The
RAM is instead totally dedicated to one operation at a time.
Thus data for a transform will be loaded, and all 12 out of 12
SCLK cycles will be available for the transfer of input data to
the RAMs. During the transfrom no transfers from the input to
the RAM or from the RAM to the output are possible. This is
why DIS and DOS can be equal to SCLK for 1024 point
transforms.
device is programmed as a single device, then
If 1024 point transforms are being performed and the
"asynchronous" operation of DAV is possible as described
earlier for transform sizes less than 1024 points. If DEN is
inactive at the time the transform has finished calculating, then
DAV will be made to go active regardless of the state of DOS.
Although 6 SCLK cycles do not have to be waited for as in
section 3.2, a transition has to be made from the transform
controlling the internal RAM to the output circuits cntrolling it.
This operation plus the time taken to advance data from the
RAMs to the output buffer takes exactly 4 SCLK cycles.
Hence the sequence of events is exactly as described in
section 3, except that section 3.3 should read 4 SCLK cycles
rather than 6. The analysis of sections 4.1 nad 4.2 are also true
if the 6 SCLK cycle time is substituted with 4 SCLK cycles.
Dummy DOS Strobes After DEF
In addition to the dummy DOS strobes needed prior to
dumping data, it is necessary to provide at least 4 DOS strobes
after DEF has gone inactive, but before DAV goes active.
These initialise the internal address counters and do not rely
on DEN also being active. They are needed every time DEF
has been used to change the operating mode.
PDSP16515A
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