87C752 Philips Semiconductors, 87C752 Datasheet - Page 12

• Manufacturer Part Number: 87C752
• Description: 80C51 8-bit microcontroller family 2K/64 OTP/ROM/ 5 channel 8 bit A/D/ I2C/ PWM/ low pin count
• Manufacturer: Philips Semiconductors

Philips Semiconductors
COUNTER/TIMER
The 8XC752 counter/timer is designated Timer 0 and is separate
from Timer I of the I
similar to mode 2 of the 80C51 counter/timer, extended to 16 bits.
When Timer 0 is used in the external counter mode, the T0 input
(P1.7) is sampled every S4P1. The counter/timer function is
controlled using the timer control register (TCON).
TCON Register
Position Symbol
TCON.7
TCON.6
TCON.5
TCON.4
TCON.3
TCON.2
TCON.1
TCON.0
Table 3. I
1999 Jul 23
MSB
I
I
I
I
2
2
2
2
GATE
80C51 8-bit microcontroller family
2K/64 OTP/ROM, 5 channel 8 bit A/D, I
C control
C data
C configuration
C status
NAME
GATE
C/T
TF
TR
IE0
IT0
IE1
IT1
C/T
INT0 Pin
2
C Special Function Register Addresses
T0 Pin
OSC
Gate
TR
2
1 – Timer 0 is enabled only when INT0 pin is
0 – Timer 0 is enabled only when TR is 1.
1 – Counter operation from T0 pin.
0 – Timer operation from internal clock.
1 – Set on overflow of T0.
0 – Cleared when processor vectors to interrupt
1 – Enable timer 0
0 – Disable timer 0
1 – Edge detected on INT0
1 – INT0 is edge triggered.
0 – INT0 is level sensitive.
1 – Edge detected on INT1
1 – INT1 is edge triggered.
0 – INT1 is level sensitive.
REGISTER ADDRESS
TF
C serial port and from the PWM. Its operation is
high and TR is 1.
routine and by reset.
Function
TR
SYMBOL
I2CON
I2CFG
I2DAT
I2STA
12
IE0
IT0
Figure 3. 83C752 Counter/Timer Block Diagram
ADDRESS
D8
98
99
F8
IE1
C/T = 0
C/T = 1
2
IT1
C, PWM, low pin count
LSB
MSB
DF
9F
FF
–
12
These flags are functionally identical to the corresponding 80C51
flags except that there is only one of the 80C51 style timers, and the
flags are combined into one register.
Note that the positions of the IE0/IT0 and IE1/IT1 bits are
transposed from the positions used in the standard 80C51 TCON
register.
A communications watchdog timer, Timer I, is described in the I
section. In I
and bus monitoring for the I
for use as a fixed time base.
The 16-bit timer/counter’s operation is similar to mode 2 operation
on the 80C51, but is extended to 16 bits. The timer/counter is
clocked by either 1/12 the oscillator frequency or by transitions on
the T0 pin. The C/T pin in special function register TCON selects
between these two modes. When the TCON TR bit is set, the
timer/counter is enabled. Register pair TH and TL are incremented
by the clock source. When the register pair overflows, the register
pair is reloaded with the values in registers RTH and RTL. The value
in the reload registers is left unchanged. The TF bit in special
function register TCON is set on counter overflow and, if the
interrupt is enabled, will generate an interrupt (see Figure 3).
DE
9E
FE
–
RTL
TL
DD
9D
FD
2
–
C applications, this timer is dedicated to time generation
RTH
TH
BIT ADDRESS
DC
9C
FC
Reload
–
2
C. In non-I
DB
FB
9B
–
TF
83C752/87C752
2
C applications, it is available
DA
LSB
9A
FA
–
Product specification
SU00300
D9
99
F9
–
Int.
D8
98
F8
–
2
C