DSP56156 Motorola Inc, DSP56156 Datasheet - Page 10

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DSP56156

Manufacturer Part Number
DSP56156
Description
16-bit Digital Signal Processor
Manufacturer
Motorola Inc
Datasheet
10
Pin Descriptions
Bus Control
Interrupt and Mode Control
Interrupt and Mode Control
MODA/IRQA
BB (Bus Busy) — active low input when
not bus master, active low output
when bus master. This pin is asserted
by the DSP when it becomes the bus
master and it performs an external ac-
cess. It is deasserted when the DSP re-
leases bus mastership. BB becomes an
input when the DSP is no longer the
bus master.
terrupt Request A) — input. This in-
put has two functions:
MODA is read and internally latched
in the DSP when the processor exits the
reset state. MODA and MODB select
the initial chip operating mode. Several
clock cycles after leaving the reset state,
the MODA pin changes to the external
interrupt request IRQA. The chip oper-
ating mode can be changed by soft-
ware after reset.
The IRQA input is a synchronized ex-
ternal interrupt request which indi-
cates that an external device is
requesting service. It may be pro-
grammed to be level sensitive or nega-
tive edge triggered. If level sensitive
triggering is selected, an external pull
up resistor is required for wired-OR
operation. If the processor is in the stop
standby state and IRQA is asserted, the
processor will exit the stop state.
• to select the initial chip operating
• to allow an external device to request
mode and,
a DSP interrupt after internal syn-
chronization.
(Mode Select A/External In-
Freescale Semiconductor, Inc.
For More Information On This Product,
DSP56156 Data Sheet
Go to: www.freescale.com
MODB/IRQB
RESET (Reset) — input. This input is a direct
MODC (Mode Select C) — input. This input
terrupt Request B) — input. This in-
put has two functions:
MODB is read and internally latched in
the DSP when the processor exits the
reset state. MODA and MODB select
the initial chip operating mode. Several
clock cycles after leaving the reset state,
the MODB pin changes to the external
interrupt request IRQB. After reset, the
chip operating mode can be changed
by software.
The IRQB input is an external interrupt
request which indicates that an exter-
nal device is requesting service. It may
be programmed to be level sensitive or
negative edge triggered. If level sensi-
tive triggering is selected, an external
pull up resistor is required for wired-
OR operation.
selects the initial bus operating mode.
When tied high, the external bus is pro-
grammed in the master mode (BR out-
put and BG input) and when tied low
the bus is programmed in the slave
mode (BR input and BG output).
MODC is read and internally latched in
the DSP when the processor exits the
reset state. After RESET, the bus operat-
ing mode can be changed by software by
writing the MC bit of the OMR register.
hardware reset of the processor. When
RESET is asserted, the DSP is initialized
and placed in the reset state. A Schmitt
• to select the initial chip operating
• to allow an external device to request
mode and,
a DSP interrupt after internal syn-
chronization.
(Mode Select B/External In-
MOTOROLA

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