DSP56F826 Motorola, DSP56F826 Datasheet - Page 42

• Manufacturer Part Number: DSP56F826
• Description: 16-bit Digital Signal Processor
• Manufacturer: Motorola

The junction-to-case thermal resistances quoted in this data sheet are determined using the first definition
on page 41. From a practical standpoint, that value is also suitable for determining the junction temperature
from a case thermocouple reading in forced convection environments. In natural convection, using the
junction-to-case thermal resistance to estimate junction temperature from a thermocouple reading on the
case of the package will estimate a junction temperature slightly hotter than actual. Hence, the new thermal
metric, Thermal Characterization Parameter, or
a better estimate of the junction temperature in natural convection when using the surface temperature of
the package. Remember that surface temperature readings of packages are subject to significant errors
caused by inadequate attachment of the sensor to the surface and to errors caused by heat loss to the sensor.
The recommended technique is to attach a 40-gauge thermocouple wire and bead to the top center of the
package with thermally conductive epoxy.
5.2 Electrical Design Considerations
Use the following list of considerations to assure correct DSP operation:
•
•
•
•
•
•
•
Use the value obtained by the equation (T
case determined by a thermocouple.
Provide a low-impedance path from the board power supply to each V
the board ground to each V
The minimum bypass requirement is to place six 0.01–0.1 F capacitors positioned as close as
possible to the package supply pins. The recommended bypass configuration is to place one bypass
capacitor on each of the eight V
Ensure that capacitor leads and associated printed circuit traces that connect to the chip V
V
Use at least a four-layer Printed Circuit Board (PCB) with two inner layers for V
Bypass the V
grade capacitor such as a tantalum capacitor.
Because the DSP output signals have fast rise and fall times, PCB trace lengths should be minimal.
SS
(GND) pins are less than 0.5 inch per capacitor lead.
This device contains protective circuitry to guard
against damage due to high static voltage or
electrical fields. However, normal precautions are
advised to avoid application of any voltages higher
than maximum rated voltages to this high-impedance
circuit. Reliability of operation is enhanced if unused
inputs are tied to an appropriate logic voltage level
(e.g., either V
DD
and V
SS
DSP56F826 Preliminary Technical Data
layers of the PCB with approximately 100 F, preferably with a high-
SS
SS
(GND) pin.
DD
or V
/V
DD
SS
CAUTION
).
pairs, including V
JT
J
– T
, has been defined to be (T
T
)/P
D
where T
DDA
T
/V
is the temperature of the package
SSA.
Electrical Design Considerations
DD
J
– T
pin on the DSP, and from
T
)/P
D
. This value gives
DD
and V
DD
SS
.
and
42