LM3S1150-IQC50 Luminary Micro, Inc., LM3S1150-IQC50 Datasheet - Page 118

• Manufacturer Part Number: LM3S1150-IQC50
• Description: Microcontroller
• Manufacturer: Luminary Micro, Inc.

Hibernation Module
7.3.5
7.4
Table 7-1. Hibernation Module Register Map
7.5
118
0x030-
Offset
0x00C
0x01C
0x12C
0x000
0x004
0x008
0x010
0x014
0x018
0x020
0x024
Name
HIBRTCC
HIBRTCM0
HIBRTCM1
HIBRTCLD
HIBCTL
HIBIM
HIBRIS
HIBMIS
HIBIC
HIBRTCT
HIBDATA
1.
2.
RTC/External Wake-Up from Hibernation
1.
2.
3.
4.
Register Map
Note:
Register Descriptions
All addresses given are relative to the Hibernation module Base Address at 0x400F.C000.
Write any data to be retained during power cut to the HIBDATA register at offsets 0x030-0x130.
Enable the external wake and start the hibernation sequence by writing 0x0000.0056 to the
HIBCTL register at offset 0x010.
Write the required RTC match value to the RTCMn registers at offset 0x004 or 0x008.
Write the required RTC load value to the HIBRTCLD register at offset 0x00C.
Write any data to be retained during power cut to the HIBDATA register at offsets 0x030-0x130.
Set the RTC Match/External Wake-Up and start the hibernation sequence by writing 0x0000.005F
to the HIBCTL register at offset 0x010.
HIBRTCC, HIBRTCM0, HIBRTCM1, HIBRTCLD, HIBRTCT, and HIBDATA are internal
BAPI module registers on the VBAPI voltage domain and the 32-kHz clock domain.
Luminary Micro Confidential-Advance Product Information
Type
W1C
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
0xFFFF.FFFF
0xFFFF.FFFF
0xFFFF.FFFF
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
Reset
Description
Hibernation RTC Counter
Hibernation RTC Match 0
Hibernation RTC Match 1
Hibernation RTC Load
Hibernation Control
Hibernation Interrupt Mask
Hibernation Raw Interrupt Status
Hibernation Masked Interrupt Status
Hibernation Interrupt Clear
Hibernation RTC Trim
Hibernation Data
June 14, 2007
page
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