LM3S1150-IQC50 Luminary Micro, Inc., LM3S1150-IQC50 Datasheet - Page 15

• Manufacturer Part Number: LM3S1150-IQC50
• Description: Microcontroller
• Manufacturer: Luminary Micro, Inc.

Register 7:
Register 8:
Register 9:
Register 10:
Register 11:
Register 12:
Register 13:
Register 14:
Register 15:
Register 16:
Register 17:
Register 18:
Register 19:
Register 20:
Register 21:
Register 22:
Register 23:
Register 24:
Register 25:
SSI ................................................................................................................................................. 291
Register 1:
Register 2:
Register 3:
Register 4:
Register 5:
Register 6:
Register 7:
Register 8:
Register 9:
Register 10:
Register 11:
Register 12:
Register 13:
Register 14:
Register 15:
Register 16:
Register 17:
Register 18:
Register 19:
Register 20:
Register 21:
Inter-Integrated Circuit (I
Register 1:
Register 2:
Register 3:
Register 4:
Register 5:
Register 6:
June 14, 2007
UART Line Control (UARTLCRH), offset 0x02C ............................................................... 268
UART Control (UARTCTL), offset 0x030 ......................................................................... 270
UART Interrupt FIFO Level Select (UARTIFLS), offset 0x034 ........................................... 272
UART Interrupt Mask (UARTIM), offset 0x038 ................................................................. 273
UART Raw Interrupt Status (UARTRIS), offset 0x03C ...................................................... 275
UART Masked Interrupt Status (UARTMIS), offset 0x040 ................................................. 276
UART Interrupt Clear (UARTICR), offset 0x044 ............................................................... 277
UART Peripheral Identification 4 (UARTPeriphID4), offset 0xFD0 ..................................... 279
UART Peripheral Identification 5 (UARTPeriphID5), offset 0xFD4 ..................................... 280
UART Peripheral Identification 6 (UARTPeriphID6), offset 0xFD8 ..................................... 281
UART Peripheral Identification 7 (UARTPeriphID7), offset 0xFDC ..................................... 282
UART Peripheral Identification 0 (UARTPeriphID0), offset 0xFE0 ...................................... 283
UART Peripheral Identification 1 (UARTPeriphID1), offset 0xFE4 ...................................... 284
UART Peripheral Identification 2 (UARTPeriphID2), offset 0xFE8 ...................................... 285
UART Peripheral Identification 3 (UARTPeriphID3), offset 0xFEC ..................................... 286
UART PrimeCell Identification 0 (UARTPCellID0), offset 0xFF0 ........................................ 287
UART PrimeCell Identification 1 (UARTPCellID1), offset 0xFF4 ........................................ 288
UART PrimeCell Identification 2 (UARTPCellID2), offset 0xFF8 ........................................ 289
UART PrimeCell Identification 3 (UARTPCellID3), offset 0xFFC ........................................ 290
SSI Control 0 (SSICR0), offset 0x000 .............................................................................. 303
SSI Control 1 (SSICR1), offset 0x004 .............................................................................. 305
SSI Data (SSIDR), offset 0x008 ...................................................................................... 307
SSI Status (SSISR), offset 0x00C ................................................................................... 308
SSI Clock Prescale (SSICPSR), offset 0x010 .................................................................. 309
SSI Interrupt Mask (SSIIM), offset 0x014 ......................................................................... 310
SSI Raw Interrupt Status (SSIRIS), offset 0x018 .............................................................. 311
SSI Masked Interrupt Status (SSIMIS), offset 0x01C ........................................................ 312
SSI Interrupt Clear (SSIICR), offset 0x020 ....................................................................... 313
SSI Peripheral Identification 4 (SSIPeriphID4), offset 0xFD0 ............................................. 314
SSI Peripheral Identification 5 (SSIPeriphID5), offset 0xFD4 ............................................. 315
SSI Peripheral Identification 6 (SSIPeriphID6), offset 0xFD8 ............................................. 316
SSI Peripheral Identification 7 (SSIPeriphID7), offset 0xFDC ............................................ 317
SSI Peripheral Identification 0 (SSIPeriphID0), offset 0xFE0 ............................................. 318
SSI Peripheral Identification 1 (SSIPeriphID1), offset 0xFE4 ............................................. 319
SSI Peripheral Identification 2 (SSIPeriphID2), offset 0xFE8 ............................................. 320
SSI Peripheral Identification 3 (SSIPeriphID3), offset 0xFEC ............................................ 321
SSI PrimeCell Identification 0 (SSIPCellID0), offset 0xFF0 ............................................... 322
SSI PrimeCell Identification 1 (SSIPCellID1), offset 0xFF4 ............................................... 323
SSI PrimeCell Identification 2 (SSIPCellID2), offset 0xFF8 ............................................... 324
SSI PrimeCell Identification 3 (SSIPCellID3), offset 0xFFC ............................................... 325
I
I
I
I
I
I
2
2
2
2
2
2
C Master Slave Address (I2CMSA), offset 0x000 ........................................................... 340
C Master Control/Status (I2CMCS), offset 0x004 ........................................................... 341
C Master Data (I2CMDR), offset 0x008 ......................................................................... 345
C Master Timer Period (I2CMTPR), offset 0x00C ........................................................... 346
C Master Interrupt Mask (I2CMIMR), offset 0x010 ......................................................... 347
C Master Raw Interrupt Status (I2CMRIS), offset 0x014 ................................................. 348
Luminary Micro Confidential-Advance Product Information
2
C) Interface ........................................................................................ 326
LM3S1150 Microcontroller
15