LM3S316-IQN25 Luminary Micro, Inc., LM3S316-IQN25 Datasheet - Page 15

• Manufacturer Part Number: LM3S316-IQN25
• Description: Microcontroller
• Manufacturer: Luminary Micro, Inc.

Register 2:
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Register 24:
Synchronous Serial Interface (SSI) ............................................................................................. 267
Register 1:
Register 2:
Register 3:
Register 4:
Register 5:
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Register 21:
Inter-Integrated Circuit (I2C) Interface ........................................................................................ 302
Register 1:
Register 2:
October 8, 2006
UART Receive Status/Error Clear (UARTRSR/UARTECR), offset 0x004 .............................. 240
UART Flag (UARTFR), offset 0x018 ....................................................................................... 242
UART Integer Baud-Rate Divisor (UARTIBRD), offset 0x024 ................................................. 244
UART Fractional Baud-Rate Divisor (UARTFBRD), offset 0x028 ........................................... 245
UART Line Control (UARTLCRH), offset 0x02C ..................................................................... 246
UART Control (UARTCTL), offset 0x030................................................................................. 248
UART Interrupt FIFO Level Select (UARTIFLS), offset 0x034 ................................................ 249
UART Interrupt Mask (UARTIM), offset 0x038 ........................................................................ 250
UART Raw Interrupt Status (UARTRIS), offset 0x03C............................................................ 252
UART Masked Interrupt Status (UARTMIS), offset 0x040 ...................................................... 253
UART Interrupt Clear (UARTICR), offset 0x044...................................................................... 254
UART Peripheral Identification 4 (UARTPeriphID4), offset 0xFD0.......................................... 255
UART Peripheral Identification 5 (UARTPeriphID5), offset 0xFD4.......................................... 256
UART Peripheral Identification 6 (UARTPeriphID6), offset 0xFD8.......................................... 257
UART Peripheral Identification 7 (UARTPeriphID7), offset 0xFDC ......................................... 258
UART Peripheral Identification 0 (UARTPeriphID0), offset 0xFE0.......................................... 259
UART Peripheral Identification 1 (UARTPeriphID1), offset 0xFE4.......................................... 260
UART Peripheral Identification 2 (UARTPeriphID2), offset 0xFE8.......................................... 261
UART Peripheral Identification 3 (UARTPeriphID3), offset 0xFEC ......................................... 262
UART PrimeCell Identification 0 (UARTPCellID0), offset 0xFF0............................................. 263
UART PrimeCell Identification 1 (UARTPCellID1), offset 0xFF4............................................. 264
UART PrimeCell Identification 2 (UARTPCellID2), offset 0xFF8............................................. 265
UART PrimeCell Identification 3 (UARTPCellID3), offset 0xFFC ............................................ 266
SSI Control 0 (SSICR0), offset 0x000 ..................................................................................... 279
SSI Control 1 (SSICR1), offset 0x004 ..................................................................................... 281
SSI Data (SSIDR), offset 0x008 .............................................................................................. 283
SSI Status (SSISR), offset 0x00C ........................................................................................... 284
SSI Clock Prescale (SSICPSR), offset 0x010 ......................................................................... 285
SSI Interrupt Mask (SSIIM), offset 0x014 ................................................................................ 286
SSI Raw Interrupt Status (SSIRIS), offset 0x018 .................................................................... 287
SSI Masked Interrupt Status (SSIMIS), offset 0x01C.............................................................. 288
SSI Interrupt Clear (SSIICR), offset 0x020.............................................................................. 289
SSI Peripheral Identification 4 (SSIPeriphID4), offset 0xFD0.................................................. 290
SSI Peripheral Identification 5 (SSIPeriphID5), offset 0xFD4.................................................. 291
SSI Peripheral Identification 6 (SSIPeriphID6), offset 0xFD8.................................................. 292
SSI Peripheral Identification 7 (SSIPeriphID7), offset 0xFDC ................................................. 293
SSI Peripheral Identification 0 (SSIPeriphID0), offset 0xFE0.................................................. 294
SSI Peripheral Identification 1 (SSIPeriphID1), offset 0xFE4.................................................. 295
SSI Peripheral Identification 2 (SSIPeriphID2), offset 0xFE8.................................................. 296
SSI Peripheral Identification 3 (SSIPeriphID3), offset 0xFEC ................................................. 297
SSI PrimeCell Identification 0 (SSIPCellID0), offset 0xFF0..................................................... 298
SSI PrimeCell Identification 1 (SSIPCellID1), offset 0xFF4..................................................... 299
SSI PrimeCell Identification 2 (SSIPCellID2), offset 0xFF8..................................................... 300
SSI PrimeCell Identification 3 (SSIPCellID3), offset 0xFFC .................................................... 301
I2C Master Slave Address (I2CMSA), offset 0x000 ................................................................ 313
I2C Master Control/Status (I2CMCS), offset 0x004................................................................. 314
Preliminary
LM3S316 Data Sheet
15