LM3S316-IQN25 Luminary Micro, Inc., LM3S316-IQN25 Datasheet - Page 355

• Manufacturer Part Number: LM3S316-IQN25
• Description: Microcontroller
• Manufacturer: Luminary Micro, Inc.

October 8, 2006
Reset
Reset
Type
Type
Bit/Field
31:4
PWM Output Inversion (PWMINVERT)
Offset 0x00C
3
2
1
0
RO
RO
31
15
0
0
Register 4: PWM Output Inversion (PWMINVERT), offset 0x00C
This register provides a master control of the polarity of the PWM signals on the device pins. The
PWM signals generated by the dead-band block are active High; they can optionally be made
active Low via this register. Disabled PWM channels are also passed through the output inverter (if
so configured) so that inactive channels maintain the correct polarity.
RO
RO
30
14
0
0
PWM3Inv
PWM2Inv
PWM1Inv
PWM0Inv
reserved
Name
RO
RO
29
13
0
0
RO
RO
28
12
0
0
Type
R/W
R/W
R/W
R/W
RO
RO
RO
27
11
0
0
RO
RO
26
10
0
0
reserved
Reset
RO
RO
25
0
9
0
0
0
0
0
0
Preliminary
RO
RO
24
0
8
0
reserved
Description
Reserved bits return an indeterminate value, and should
never be changed.
When set, the generated PWM3 signal is inverted.
When set, the generated PWM2 signal is inverted.
When set, the generated PWM1 signal is inverted.
When set, the generated PWM0 signal is inverted.
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
PWM3Inv
R/W
RO
19
0
3
0
PWM2Inv
LM3S316 Data Sheet
R/W
RO
18
0
2
0
PWM1Inv
R/W
RO
17
0
1
0
PWM0Inv
R/W
RO
16
0
0
0
355