DS90CR218 National Semiconductor, DS90CR218 Datasheet - Page 4

• Manufacturer Part Number: DS90CR218
• Description: +3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link Receiver - 75 MHz
• Manufacturer: National Semiconductor

www.national.com
CLHT
CHLT
RSPos0
RSPos1
RSPos2
RSPos3
RSPos4
RSPos5
RSPos6
RSKM
RCOP
RCOH
RCOL
RSRC
RHRC
RCCD
RPLLS
RPDD
Symbol
Receiver Switching Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified
Note 4: Receiver Skew Margin is defined as the valid data sampling region at the receiver inputs. This margin takes into account the transmitter pulse positions (min
and max) and the receiver input setup and hold time (internal data sampling window). This margin allows LVDS interconnect skew, inter-symbol interference (both
dependent on type/length of cable), and source clock jitter less than 250 ps.
Note 5: Total latency for the channel link chipset is a function of clock period and gate delays through the transmitter (TCCD) and receiver (RCCD). The total latency
for the 217/287 transmitter and 218/288 receiver is: (T + TCCD) + (2
AC Timing Diagrams
CMOS/TTL Low-to-High Transition Time ( Figure 2 )
CMOS/TTL High-to-Low Transition Time ( Figure 2 )
Receiver Input Strobe Position for Bit 0 ( Figure 8 )
Receiver Input Strobe Position for Bit 1
Receiver Input Strobe Position for Bit 2
Receiver Input Strobe Position for Bit 3
Receiver Input Strobe Position for Bit 4
Receiver Input Strobe Position for Bit 5
Receiver Input Strobe Position for Bit 6
Receiver Skew Margin (when used with DS90CR217)(Note
4) ( Figure 9 )
RxCLK OUT Period ( Figure 3 )
RxCLK OUT High Time ( Figure 3 )
RxCLK OUT Low Time ( Figure 3 )
RxOUT Setup to RxCLK OUT ( Figure 3 )
RxOUT Hold to RxCLK OUT ( Figure 3 )
RxCLK IN to RxCLK OUT Delay
Receiver Phase Lock Loop Set ( Figure 5 )
Receiver Powerdown Delay ( Figure 7 )
FIGURE 2. DS90CR218 (Receiver) CMOS/TTL Output Load and Transition Times
10087105
FIGURE 1. “Worst Case” Test Pattern
@
Parameter
25˚C, V
*
CC
T + RCCD), where T = Clock period. See also DS90CR217 datasheet.
= 3.3V (Note 5)( Figure 4 )
4
f = 75 MHz
f = 75 MHz
f = 75 MHz
10.11
12.01
13.33
0.58
2.49
4.39
6.30
8.20
Min
380
3.6
3.6
3.5
3.5
3.4
10.48
12.38
0.95
2.86
4.76
6.67
8.57
Typ
2.0
1.8
5.0
T
5
5
10087102
10.85
12.75
Max
1.32
3.23
5.13
7.04
8.94
3.5
3.5
6.0
6.0
7.3
50
10
1
10087106
Units
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ps
ns
ns
ns
ns
ns
ns
µs