AN1827 Freescale Semiconductor / Motorola, AN1827 Datasheet - Page 20
AN1827
Manufacturer Part Number
AN1827
Description
Programming and Erasing FLASH Memory on the MC68HC908AS60
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
1.AN1827.pdf
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Application Note
20
NOTE:
NOTE:
The smart programming algorithm ensures programming data retention
and minimum program time and reduces the possibility of program
disturb. The margin read operation imposes a more stringent read
condition on the bit cell so that long-term data retention is ensured. The
operation is the same as the ordinary read operation except the margin
bit is set (MARGIN = 1). However, when the margin read operation is
executed, data is read automatically with seven additional bus cycles per
byte. This additional settling time allows sensing of the lower bit cell
current.
The smart programming algorithm also uses multiple short program
pulses instead of using one long program pulse. Therefore, whenever
the margin read is successful, the page programming is completed even
if the program pulses do not reach the maximum. If the program pulses
reach the maximum, it means that programming operation has failed.
When the COP is enabled, the seven additional cycles of the margin
read operation must be considered. Since the COP counter continues to
run during the additional cycles, the additional cycles need to be added
to the COP feed loop.
When the block protect bits in the FLASH block protect register are set,
a portion of the memory will be locked so that no further erase or
program operation may be performed. However, when high voltage is
applied on the IRQ pin, the whole FLASH memory is unprotected. The
details are described in the
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
Control and Block Protect
Registers.
MOTOROLA
AN1827
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