AN1827 Freescale Semiconductor / Motorola, AN1827 Datasheet - Page 5

• Manufacturer Part Number: AN1827
• Description: Programming and Erasing FLASH Memory on the MC68HC908AS60
• Manufacturer: Freescale Semiconductor / Motorola

Functional Description
AN1827
MOTOROLA
The FLASH memory on the MC68HC908AS60 physically consists of two
independent arrays with two bytes of block protection and additional
bytes of user vectors. An erased bit reads as a logic 0 and a
programmed bit reads as a logic 1. Program and erase operations are
facilitated through control bits in memory mapped registers. Details for
these operations appear later in this application note.
Memory in the FLASH array is organized into pages within rows. There
are eight pages of memory per row with eight bytes per page. The
minimum erase block size is a single row, 64 bytes. Programming is
performed on a per-page basis, eight bytes at a time. The address
ranges for the user memory, control registers, block protect registers,
and vectors are listed here.
The FLASH memory map on the MC68HC908AS60 consists of:
To program the FLASH, each page must be erased before it is
programmed. The erase block sizes are found in
The four 64-byte row address boundaries for the MC68HC908AS60 are:
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Freescale Semiconductor, Inc.
For More Information On This Product,
$0450–$05FF, FLASH-2 array, 432 bytes
$0E00–$7FFF, FLASH-2 array, 29,184 bytes
$8000–$FDFF, FLASH-1 array, 32,256 bytes
$FE0B, FLASH-1 control register, FLCR1
$FE11, FLASH-2 control register, FLCR2
$FF80, FLASH-1 block protect register, FLBPR1
$FF81, FLASH-2 block protect register, FLBPR2
$FFDA–$FFFF, FLASH-1 vector space, 38 bytes
$xx00–$xx3F
$xx40–$xx7F
$xx80–$xxBF
$xxC0–$xxFF
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Erase
Functional Description
Operation.
Application Note
5