AN2007 Motorola / Freescale Semiconductor, AN2007 Datasheet - Page 5

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AN2007

Manufacturer Part Number
AN2007
Description
Evaluating ColdFire in a 68K Target System: MC68340 Gateway Reference Design
Manufacturer
Motorola / Freescale Semiconductor
Datasheet
MC68340 PGA–MCF5206FT, Gateway Reference Design
Figure 3. MC92310 Block Diagram
1.2.1.1 Clock Circuit
The clock supply to both the MCF5206 microprocessor and MC92310 dual channel DMA ASIC is
selectable via jumper JP3. The clock source can be from either a 25MHz oscillator (SMT), (jumper position
1 / 2), or the CLKIN input pin connected to an external source on the target hardware, (jumper position 2 / 3).
1.2.1.2 Reset Circuit
The main reset signal, RSTI, is controlled by the MAX7705CSA chip shown in Figure 4. This chip provides
the circuit with power-supply glitch immunity and guaranteed power-on reset delay whilst continually
monitoring the power supply to the microprocessor. The added advantage of using this type of device is that
it requires no additional discrete components. The chip is powered by a 5V supply and is activated by
bridging the RESET jumper, JP2. The RESET line is pulled up to a logic high level via a 4.7K resistor (R37).
The RESET signal is jumper selectable to allow the target hardware to reset the MCF5206 if required.
1.2.1.3 Direct Memory Access Controller (DMA)
An ASIC has been designed to provide the functionality of the MC68340 DMA controller with a ColdFire
interface.
MC68340 Gateway Reference Design
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