CY22050 Cypress Semiconductor, CY22050 Datasheet - Page 4

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CY22050

Manufacturer Part Number
CY22050
Description
One-PLL General Purpose Flash Programmable Clock Generator
Manufacturer
Cypress Semiconductor
Datasheet

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Document #: 38-07006 Rev. *D
Reference Crystal Input
The input crystal oscillator of the CY22050 is an important
feature because of the flexibility it allows the user in selecting
a crystal as a reference clock source. The oscillator inverter
has programmable gain, allowing for maximum compatibility
with a reference crystal, based on manufacturer, process,
performance, and quality.
The value of the input load capacitors is determined by eight
bits in a programmable register. Total load capacitance is
determined by the formula:
Absolute Maximum Conditions
Recommended Operating Conditions
V
V
T
T
ESD
V
VDDL
VDDL
T
T
C
C
f
f
t
Note:
REFD
REFC
PU
3. Rated for 10 years.
AC
AI
S
J
DD
DDL
DD
LOAD
LOAD
Parameter
CapLoad = (C
Parameter
HI
LO
Supply Voltage
I/O Supply Voltage
Storage Temperature
Junction Temperature
Package Power Dissipation—Commercial Temp
Package Power Dissipation—Industrial Temp
Digital Inputs
Digital Outputs referred to V
Digital Outputs referred to V
Static Discharge Voltage per MIL-STD-833, Method 3015
L
– C
Operating Voltage
Operating Voltage
Operating Voltage
Ambient Commercial Temp
Ambient Industrial Temp
Max. Load Capacitance V
Max. Load Capacitance V
Driven REF
Crystal REF
Power-up time for all V
specified voltage (power ramps must be
monotonic)
BRD
– C
CHIP
)/0.09375 pF
[3]
Description
Description
DD
DDL
DD
s to reach minimum
DD
DDL
/V
= 2.5V
DDL
= 3.3V
In CyClocksRT, enter the crystal capacitance (C
of CapLoad will be determined automatically and programmed
into the CY22050.
If you require greater control over the CapLoad value, consider
using the CY22150F for serial configuration and control of the
input load capacitors. For an external clock source, the default
is 0.
Input load capacitors are placed on the CY22050 die to reduce
external component cost. These capacitors are true
parallel-plate capacitors, designed to reduce the frequency
shift that occurs when non-linear load capacitance is affected
by load, bias, supply, and temperature changes.
3.135
3.135
2.375
Min.
0.05
–40
0
1
8
AV
V
V
SS
SS
SS
Min.
–0.5
–0.5
–65
Typ.
3.3
3.3
2.5
– 0.3
– 0.3
– 0.3
AV
V
V
3.465
3.465
2.625
Max.
DDL
133
500
DD
70
85
15
15
30
DD
Max.
2000
125
125
450
380
7.0
7.0
+ 0.3
+ 0.3
+0.3
CY22050
L
). The value
Page 4 of 9
Unit
MHz
MHz
ms
pF
pF
°C
°C
Unit
V
V
V
mW
mW
°C
°C
V
V
V
V
V
V

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