CY28405 Cypress Semiconductor, CY28405 Datasheet - Page 17

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CY28405

Manufacturer Part Number
CY28405
Description
CK409-Compliant Clock Synthesizer
Manufacturer
Cypress Semiconductor
Datasheet

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Document #: 38-07512 Rev. *B
Table 9. Maximum Lumped Capacitive Output Loads
Table 10.CPU Clock Current Select Function
Ordering Information
CY28405OC
CY28405OCT
CY28405OXC
CY28405OXCT
Lead Free
3V66 Clocks
Board Target Trace/Term Z
PCI Clocks
USB Clock
DOT Clock
REF Clock
Part Number
Clock
Figure 8. Lumped Load For Single-Ended Output Signals (for AC Parameter Measurement)
50 Ohms
IR E F
C P U C
C P U T
2 .4 V
1 .5 V
0 .4 V
4 7 5 Ω
Max Load
48-pin Shrunk Small Outline package (SSOP)
48-pin Shrunk Small Outline package (SSOP) – Tape and Reel
48-pin Shrunk Small Outline package (SSOP)
48-pin Shrunk Small Outline package (SSOP) – Tape and Reel
30
30
20
10
30
3 3 Ω
T r
3 3 Ω
-
Figure 7. 0.7V Load Configuration
Reference R, I
4 9 .9 Ω
R
4 9 .9 Ω
3 .3 V
REF
3 .3 V s ig n a l s
Units
pF
pF
pF
pF
pF
= 475 1%, I
T
T
P C B
P C B
tD C
Package Type
T f
REF
REF
– V
Test and Measurement Set-up
For Differential CPU and SRC Output Signals
The following diagram shows lumped test load configurations
for the differential Host Clock Outputs.
DD
= 2.32 mA
0 V
(3*R
2 p F
2 p F
REF
M e a s u re m e n t
M e a s u re m e n t
)
-
O u tp u t u n d e r T e s t
P o in t
P o in t
Output Current
I
OH
= 6*I
P r o b e
L o a d C a p
REF
Commercial, 0° to 70°C
Commercial, 0° to 70°C
Commercial, 0° to 70°C
Commercial, 0° to 70°C
Product Flow
CY28405
Page 17 of 19
0.7V @ 50
V
OH
@ Z

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