CY28RS400 Cypress Semiconductor, CY28RS400 Datasheet - Page 2

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CY28RS400

Manufacturer Part Number
CY28RS400
Description
Clock Generator for ATI RS400 Chipset
Manufacturer
Cypress Semiconductor
Datasheet

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Document #: 38-07637 Rev. *B
Pin Description
27, 28, 30, 29
22, 23, 24, 25
47,46,43,42,
12, 13, 16,
17, 18, 19,
15, 20, 26
Pin No.
,34,33
14, 21
41,40
10,11
50
37
54
53
52
48
45
51
56
32
39
44
49
55
36
31
38
35
7
8
4
6
9
3
5
1
2
VTT_PWRGD#/PD
CLKREQ#[0:1]
PCI0/409_410
SRCST/C[1:0]
CPUT/C[2:0]
SRCT/C[5:0]
VDD_SRCS
VDD_SRC1
VSS_SRCS
VSS_SRC1
REF0/ FSA
CPU_STP#
REF1/FSB
VDD_CPU
VDD_REF
VDD_SRC
VSS_CPU
VSS_SRC
VSS_REF
VDD_PCI
VSS_PCI
VDD_48
USB_48
VSS_48
SDATA
VDDA
XOUT
SCLK
VSSA
REF2
Name
IREF
FSC
XIN
I/O, SE, 14.318MHz REF clock ouput/ CPU Frequency Select. Intel
I/O, PU SMBus compatible SDATA.This pin has an internal pullup, but is tri-stated in power-down.
I/O, SE 14.318MHz REF clock ouput
O, DIF Differential CPU clock output.
O, DIF Differential Selectable Serial reference clock. Intel Type-X buffer. Includes overclock
O, DIF 100 MHz Differential Serial reference clock. Intel Type-X buffer.
O, SE 14.318MHz REF clock ouput. Intel Type-5 buffer.
O, SE 48-MHz clock output. Intel Type-3A buffer.
I, SE,
PWR 3.3V power supply for USB outputs
PWR 3.3V power supply for CPU outputs
PWR 3.3V power supply for PCI outputs
PWR 3.3V power supply for REF outputs
PWR 3.3V power supply for SRC outputs
PWR 3.3V power supply for SRC outputs
PWR 3.3V power supply for SRCS outputs
PWR 3.3V Analog Power for PLLs
I, PU
GND
GND
GND
GND
GND
GND
GND
GND
Type
I,PU
I/O,
PD
PD
PD
O
I
I
I
I
Intel Type-X buffer.
33-MHz clock output/CPU Frequency table Select
Intel Type-5 buffer.
0 = 410 frequency select table
1 = 409 frequency select table.
This has an internal pull-down
A precision resistor attached to this pin is connected to the internal current reference.
SMBus-compatible SCLOCK.This pin has an internal pullup, but is tri-stated in power-down.
support through SMBUS
Output Enable control for SRCT/C. Output enable control required by Minicard
specification. These pins have an internal pull-down.
0 = Selected SRC outputs are enabled, 1 = Selected SRC outputs are disabled
3.3V LVTTL input. This pin is a level sensitive strobe used to latch the FS_A, FS_B,
FS_C and 409_410 inputs. After asserting VTT_PWRGD# (active low), this pin
becomes a realtime input for asserting power down (active high)
3.3V LVTTL input. This pin is used to gate the CPU outputs. CPU outputs are turned
off two cycles after assertion of this pin
3.3V LVTTL input. CPU Clock Frequency Select
Ground for USB outputs
Ground for CPU outputs
Ground for PCI outputs
Ground for REF outputs
Ground for SRC outputs
Ground for SRC outputs
Ground for SRCS outputs
Analog Ground
14.318-MHz Crystal Input
14.318-MHz Crystal Output
/ CPU Frequency Select.
Description
Intel Type-5 buffer.
Type-5 buffer.
CY28RS400
Page 2 of 19

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