CY2DP1504 Cypress Semiconductor, CY2DP1504 Datasheet - Page 3

• Manufacturer Part Number: CY2DP1504
• Description: 1:4 LVPECL Fanout Buffer
• Manufacturer: Cypress Semiconductor

Pinouts
Table 1. Pin Definitions
Document Number: 001-56215 Rev. *F
1
2
3
4
5
6
7
8,9
10,13,18
11,14,16,19
12,15,17,20
Pin No.
V
CLK_EN
IN_SEL
IN0
IN0#
IN1
IN1#
NC
V
Q(0:3)#
Q(0:3)
SS
DD
Pin Name
Power
Input
Input
Input
Input
Input
Input
Power
Output
Output
Figure 1. Pin Diagram – 20-Pin TSSOP Package
Pin Type
CLK_EN
IN_SEL
IN0#
IN1#
IN0
V
V
IN1
NC
NC
SS
DD
Ground
Synchronous clock enable. Low-voltage complementary metal oxide
semiconductor (LVCMOS)/low-voltage transistor-transistor-logic (LVTTL).
When CLK_EN = Low, Q(0:3) outputs are held Low and Q(0:3)# outputs
are held High
Input clock select pin. LVCMOS/LVTTL;
When IN_SEL = Low, the IN0/IN0# differential input pair is active
When IN_SEL = High, the IN1/IN1# differential input pair is active
LVPECL input clock. Active when IN_SEL = Low
LVPECL complementary input clock. Active when IN_SEL = Low
LVPECL input clock. Active when IN_SEL = High
LVPECL complementary input clock. Active when IN_SEL = High
No connection
Power supply
LVPECL complementary output clocks
LVPECL output clocks
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
Q0
Q0#
V
Q1
Q1#
Q2
Q2#
V
Q 3
Q3#
DD
DD
Description
CY2DP1504
Page 3 of 14
[+] Feedback