AN2311 Freescale Semiconductor / Motorola, AN2311 Datasheet - Page 5

• Manufacturer Part Number: AN2311
• Description: Bootstrapping the MSC8101 Device Through the HDI16 Port
• Manufacturer: Freescale Semiconductor / Motorola

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Bootstrapping Process
For the example driver, the register settings shown in Table 3 are required.
When the HDI16 mode of operation is selected, an external host must bootstrap the device. This section
describes the procedure for bootstrapping the slave MSC8101 over the HDI16 port and the host actions
required to download the reset configuration word and application code.
The bootstrapping process has to two parts:
• Writing the Hard Reset Configuration Word (HRCW) to the slave HDI16.
• Writing the target application image to the slave HDI16.
When the MSC8101 device is bootstrapped through the HDI16 port, it remains in reset until the HRCW
is downloaded via the HDI16 by writing four 8-bit values to the Reset Configuration Registers
(RSCFG[0–3]) at host address offsets 0x8, 0x9, 0xA, and 0xB, respectively. The order of the bytes is
important because the LSB of the HRCW must be written to location 0x8. Once all reset configuration
bytes are written to RSCFG[0–3], the MSC8101 device locks the PLL and DLL, exits reset, and begins
executing its boot ROM. The main actions of the slave MSC8101 boot ROM are as follows:
1. Get the IMMR of the device using the ISBSEL value in the HRCW.
2. Initialize the internal SRAM (
3. Disable the software watchdog.
4. Enable and set up the host port.
5. Load all program blocks, with size not equal to 0.
6. Load the end block with size equal to 0 and execute the application code.
The host MSC8101 device performs step 5 by reading the application image array and downloading it
word by word to the HDI16 port. Figure 5 shows the data transfer flow performed by the host, as well as
the respective actions from the slave MSC8101 boot ROM. Steps 4, 5, and 6 are indicated on the figure.
Register
Freescale Semiconductor, Inc.
MAMR
OR6
BCR
BR6
For More Information On This Product,
Go to: www.freescale.com
Table 3. Host Memory Controller Register Settings
CS10
0xFFFF8100
0x04001081
0x00000000
0x00000000
Value
and UPMC), depending on the SCCR settings.
Base address of the HDI16 port at 0x04000000, 16-bit
port size, UPMA
32 KB memory space
System
Single Master MSC8101 bus mode
Description
Bootstrapping Process
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