CY2PP3115 Cypress Semiconductor, CY2PP3115 Datasheet - Page 5

• Manufacturer Part Number: CY2PP3115
• Description: Differential Fanout Buffer
• Manufacturer: Cypress Semiconductor

Document #: 38-07502 Rev.*A
AC Electrical Specifications
Table 2. TPD–Propagation Delay 66-MHz 50% Duty Cycle
Timing Definitions
Note:
19. Output pulse skew is the absolute difference of the propagation delay times: | tPLH – tPHL |.
tsk
T
tsk
T
TTB
Parameter
JIT(CC)
R
,T
(PP)
(P)
F
Output-to-output skew (part-to-part)
Output cycle-to-cycle jitter (determin-
istic/Intrinsic)
All outputs /1
Output cycle-to-cycle jitter (determin-
istic/Intrinsic)
All outputs /2
Output cycle-to-cycle jitter (determin-
istic/Intrinsic)
All outputs Bank(A and C)/1, Bank(B and
D)/2
Output cycle-to-cycle jitter (determin-
istic/Intrinsic)
All outputs Bank A/1, Bank(B,C and D)/2
Output pulse skew
Output Rise / Fall time
Total Timing Budget
FSELA
FSELB
FSELC
FSELD
TPD
VCC
VEE
VIH
VIL
Description
VPP
[19]
VPP range
0.1V - 1.3V
Figure 1. PECL Waveform Definitions
PRELIMINARY
VEE = 0.0V
VCC = 2.5V or 3.3V
0
1
0
1
0
1
0
1
50% duty cycle Standard load Differential
500 MHz 50% duty cycle Standard load
Operation
500 MHz 50% duty cycle Standard load Differ-
ential Operation
660 MHz 50% duty cycle Standard load Differ-
ential Operation
660 MHz 50% duty cycle Standard load Differ-
ential Operation
660 MHz 50% duty cycle Standard load Differ-
ential Operation
660 MHz 50% duty cycle Standard load Differ-
ential Operation
660 MHz 50% duty cycle Differential 20% to
80%
VCM R M ax = VCC
0.900
0.979
0.951
0.962
0.952
1.019
0.986
1.018
Condition
VCM R M in = 1.2V
0
CLK_SEL
0.974
0.982
0.974
0.966
0.974
1.021
0.980
1.022
FastEdge™ Series
1
VCM R
Min.
–
–
–
–
–
–
–
–
CY2PP3115
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Max.
Unit
200
250
0.3
75
ns
ns
ns
ns
ns
ns
ns
ns
2
2
2
2
Unit
ns
ps
ps
ps
ps
ps
ps
ps