SSD1730 Solomon, SSD1730 Datasheet - Page 5

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SSD1730

Manufacturer Part Number
SSD1730
Description
SSD1730 MLA Power Chip CMOS
Manufacturer
Solomon
Datasheet
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5. FUNCTIONAL BLOCK DESCRIPTIONS
3
SSD1730
Clock Signal Generator
This circuit generates the clock for the charge pump from the pulse signal LP. When the display control signal XSLP is
set to VSS, the clock will stop and the voltage converter will halt. For normal display mode, XSLP must be tied to
VDD_PWR. Besides, this circuit also generates the signals AB & XBB which are the clocks for the column driver voltage
generator and the row driver voltage generator. Figure 7 shows their timing characteristics.
-V1 Discharge Circuit
When the display is off or the power is off, this circuit will discharge the residual charges at the negative voltage level-side
power supply voltage terminal –V1 of the row driver.
Column Driver Voltage Generator
This circuit accompanying with external components generates voltages for column driver. In SSD1730, three voltage
outputs including V2, -V2 and -V3 will be generated and their voltage levels are based on the supply voltage VDD_PWR.
Their relationship is V2 = VDD_PWR/2, -V2 = -(VDD_PWR/2) and –V3 = -VDD_PWR.
Row Driver Voltage Generator
+V1 Voltage Generator
+V1 voltage generator accompanies with an external MOS transistor to generate +V1 voltage, which is
required for the row driver. Figure 10 shows the accompanying external circuit for generating +V1 voltage.
LCD
This circuit generates the polarity reverse signals FR and XFR from the pulse signal LP. The polarity reversal interval is
controlled by four pins L0, L1, L2 & L3 and the range is from 2P to 17P (1P is equal to one LP period), Table 15 shows
their relationship. The polarity of the FR signal and the XFR signal are mutually opposite, so that the upper and lower
screens can be driven mutually in opposite phases when a two-screen drive panel is used.
This voltage generator consists of three circuits (1) Row driver voltage conversion circuit, (2) VDD_ROW voltage
generator and (3) +V1 voltage generator.
Row Driver Voltage Conversion Circuit
This circuit generates VEE voltage which is used to generate +V1 & -V1 power supply voltages for row
driver. There are two step-up modes 5X and 6X which are set by the HC pin. When HC pin is tied to VSS, 5X
step-up mode is chosen. When HC pin is tied to -V3B, 6X step-up mode is chosen.
In SSD1730, VDD_PWR is taken as the reference, VEE is equal to -4 x VDD_PWR at 5X step-up mode
while VEE is equal to -5 x VDD_PWR at 6X step-up mode.
For the contrast adjustment, it is performed through the use of an external emitter follower circuit to adjust
VEE to generate –V1, this contrast control circuit is shown in Figure 9.
VDD_ROW Voltage Generator
VDD_ROW voltage generator is used to generate VDD_ROW, which is the power supply to the logic circuit
of a row driver.
Polarity
Rev 2.0
04/2002
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Reverse Signal Generator
SOLOMON
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