SSD1789A Solomon Systech, SSD1789A Datasheet - Page 16

• Manufacturer Part Number: SSD1789A
• Description: CSTN LCD Driver
• Manufacturer: Solomon Systech

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6
6.1
This pin is the chip selection input. The chip is enabled for MCU communication only when CS is pulled low.
6.2
This pin is the reset signal input. Initialization of the chip is started once the reset pin is pulled low. The minimum pulse
width for reset sequence is 10us.
6.3
This pin is Data/Command control pin. When the pin is pulled high, the input at D7-D0 is treated as display data. When
the pin is pulled low, the input at D7-D0 will be transferred to the command register.
6.4
This pin is MCU interface input. When 6800 interface mode is selected, this pin will be used as Read/Write (
selection input. Read mode will be carried out when this pin is pulled high and write mode when this pin is pulled low.
When 8080 interface mode is selected, this pin is the Write ( WR ) control signal input. Data write operation is initiated
when this pin is pulled low and the chip is selected.
6.5
This pin is MCU interface input. When 6800 interface mode is selected, this pin will be used as the Enable (E) signal.
Read/ write operation is initiated when this pin is pulled high and the chip is selected.
When 8080 interface mode is selected, this pin is the Read ( RD ) control signal input. Data read operation is initiated
when this pin is pulled low and the chip is selected.
6.6
These pins are the bus interface mode selection input. Different bus interface can be selected changing the setting of
these pins.
Table 3 - Bus interface mode selection by PS2-PS0
Note1: For serial applications, D0 – D5, D8 – D15,
Note2: Read back operation is only available in parallel mode
6.7
These pins are the 16-bit bi-directional data bus in parallel interface mode. D15 is the MSB while D
serial mode selected, D7 is the serial data input SDA and D6 is the serial clock input SCK.
6.8
This pin is the system power supply pin of the logic block.
6.9
This pin is the system power supply pin of IO buffer. Please refer to Figure 26 on Page 67 for connection example.
Solomon Systech
PS2
H
H
H
L
L
L
PIN DESCRIPTION
E ( RD )
PS0 – PS2
D0-D15
V
V
D/
CS
RES
R
DD
DDIO
/
PS1
H
H
L
H
L
L
C
W
( WR )
PS0
H
L
L
H
H
L
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3-lines serial peripheral interface (SPI)
4-lines serial peripheral interface (SPI)
MPU Interface
16-bit 8080 parallel interface
8-bit 8080 parallel interface
16-bit 6800 parallel interface
8-bit 6800 parallel interface
R
/
W
( WR ), E( RD ) are recommended to connect V
Jul 2004
P 16/69 Rev 1.0
0
is the LSB. When
DD
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SSD1789A Series
.
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/
W
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