SSD1859 Solomon Systech, SSD1859 Datasheet

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SSD1859

Manufacturer Part Number
SSD1859
Description
128 x 80 STN LCD Segment / Common 4 G/S Drive
Manufacturer
Solomon Systech
Datasheet
SOLOMON SYSTECH
SEMICONDUCTOR TECHNICAL DATA
SSD1859
This document contains information on a new product. Specifications and information herein are subject to
change without notice.
http://www.solomon-systech.com
LCD Segment / Common 4 G/S Driver with Controller
Rev 1.0
P1/48
Advance Information
Dec 2003
SSD1859
128 x 80 STN
Copyright  2003 Solomon Systech Limited
www.DataSheet4U.com

Related parts for SSD1859

SSD1859 Summary of contents

Page 1

... Advance Information LCD Segment / Common 4 G/S Driver with Controller This document contains information on a new product. Specifications and information herein are subject to change without notice. http://www.solomon-systech.com SSD1859 Rev 1.0 P1/48 SSD1859 128 x 80 STN Copyright  2003 Solomon Systech Limited Dec 2003 www.DataSheet4U.com ...

Page 2

... TABLE OF CONTENTS 1. GENERAL DESCRIPTION .................................................................................................................... 5 2. FEATURES ............................................................................................................................................ 5 3. ORDERING INFORMATION.................................................................................................................. 5 4. BLOCK DIAGRAM ................................................................................................................................ 6 5. DIE PAD ARRANGEMENT (SSD1859Z DIE PIN ASSIGNMENT) ....................................................... 7 6. PIN DESCRIPTIONS ........................................................................................................................... 11 7. FUNCTIONAL BLOCK DESCRIPTIONS ............................................................................................ 14 8. COMMAND TABLE ............................................................................................................................. 20 9. EXTENDED COMMAND TABLE......................................................................................................... 24 10. COMMAND DESCRIPTIONS ............................................................................................................ 27 11. MAXIMUM RATINGS......................................................................................................................... 32 12. ELECTRICAL CHARACTERISTICS ................................................................................................. 33 13 ...

Page 3

... TABLE OF TABLES Table 1 - Ordering Information................................................................................................................ 5 Table 2 - SSD1859 Die Pad Coordinates ................................................................................................ 8 Table 3 - Command Table...................................................................................................................... 20 Table 4 - Extended Command Table .................................................................................................... 24 Table 5 - Maximum Ratings (Voltage Referenced to V Table Characteristics (Voltages Referenced to VSS, VDD=1.8 to 3.3V, TA=-40 to 85°C; unless otherwise specified.) .................................................................................................. 33 Table Characteristics (TA=-40 to 85°C, Voltages referenced to VSS, VDD=VCI=2.7V, unless otherwise specified.)............................................................................................................... 35 Table 8 - Parallel 6800-series Timing Characteristics (TA=-40 to 85° ...

Page 4

... Figure 1 - SSD1859 Block Diagram ........................................................................................................ 6 Figure 2 - SSD1859 Die Pad Floor Plan.................................................................................................. 7 Figure 3 - Display data read with the insertion of dummy read ........................................................ 14 Figure 4 - Graphic Display Data RAM (GDDRAM) Address Map for SSD1859 (with vertical scroll value 48H).............................................................................................................................. 16 Figure 5 - Oscillator Circuitry................................................................................................................ 17 Figure 6 - LCD Display Example “0” .................................................................................................... 19 Figure 7 - LCD Driving Signal From SSD1859 ...

Page 5

... GENERAL DESCRIPTION SSD1859 is a single-chip CMOS LCD driver with controller for liquid crystal dot-matrix graphic display system. SSD1859 consists of 210 high voltage driving output pins for driving 128 Segments and 80 Commons and 1 icon line. SSD1859 display data directly from its internal 128x81x2 bits Graphic Display Data RAM (GDDRAM) ...

Page 6

... COM0 to COM79 SEG0 ~SEG127 HV Buffer Cell Level Shifter 209 Bits Latch GDDRAM 128 Bits Command Decoder R (WR) (RD) (SDA)(SCK) Figure 1 - SSD1859 Block Diagram Dec 2003 www.DataSheet4U.com Level Selector VOUT VL5 VL4 VL3 VL2 VSS VR INTRS LCD Driving ...

Page 7

... DIE PAD ARRANGEMENT (SSD1859Z DIE PIN ASSIGNMENT) 141 NC 130 COM30 COM29 COM28 COM27 COM26 129 COM25 COM3 COM2 COM1 COM0 ICONS SEG0 SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG117 SEG118 SEG119 SEG120 SEG121 SEG122 SEG123 SEG124 SEG125 SEG126 SEG127 COM40 COM41 ...

Page 8

... Table 2 - SSD1859 Die Pad Coordinates Pad# Signal X-pos Y-pos 1 NC -4883.2 -353 -4806.9 -353 -4730.6 -353 -4654.3 -353 -4578.0 -353 -4501.7 -353 -4425.4 -353 -4349.1 -353 -4272.8 -353 -4196.5 -353 -4120.2 -353.5 ...

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... COM1 3630.9 341.5 172 COM0 3576.3 341.5 173 ICONS 3521.7 341.5 174 SEG0 3467.1 341.5 175 SEG1 3412.5 341.5 SSD1859 Rev 1.0 P 9/48 Pad# Signal X-pos Y-pos 176 SEG2 3357.9 341.5 177 SEG3 3303.3 341.5 178 SEG4 3248.7 341.5 179 SEG5 3194 ...

Page 10

... COM72 -5290.5 127.1 337 COM73 -5290.5 72.5 338 COM74 -5290.5 17.9 339 COM75 -5290.5 -36.7 340 COM76 -5290.5 -91.3 341 COM77 -5290.5 -145.9 342 COM78 -5290.5 -200.5 343 COM79 -5290.5 -255.1 344 ICONS -5290.5 -309.7 345 NC -5290.5 -364.3 Dec 2003 www.DataSheet4U.com P 10/48 Rev 1.0 SSD1859 ...

Page 11

... VOUT, VR and VSS. VDD This pin is power supply. VSS This is a logic ground pin. It must connect to GND from external supply. SSD1859 Rev 1.0 P 11/48 Dec 2003 high and the chip is selected. When 8080 interface mode is is low and the chip is selected. ...

Page 12

... This pin is the external clock input for the device if external clock mode is selected by software command. Under POR operation, this pin should be left opened and internal oscillator will be used after power on reset. Solomon Systech is set. DC-DC Converter Factor Dec 2003 P 12/48 Rev 1.0 www.DataSheet4U.com SSD1859 ...

Page 13

... EN80 This pin must be connected to VDD. NC These No Connection pins should NOT be connected to any signal pins nor shorted together. They should be left open. SSD1859 Rev 1.0 P 13/48 Dec 2003 www.DataSheet4U.com Solomon Systech ...

Page 14

... input. The data read1 data read and input indicate a write or read cycle when Dec 2003 www.DataSheet4U.com , and . and input serves as data CS n+1 n+2 data read and . The low 14/48 Rev 1.0 SSD1859 ...

Page 15

... Segment and Common outputs are provided respectively. For vertical scrolling of the display, an internal register storing the display start line can be set to control the portion of the RAM data to be mapped to the display. Figure 4 shows the cases in which the display start line register are set at 48H. SSD1859 Rev 1.0 P 15/48 Dec 2003 and ...

Page 16

... Internal Column Address ADC = ADC = SEG Outputs SEG0 SEG1 Figure 4 - Graphic Display Data RAM (GDDRAM) Address Map for SSD1859 (with vertical scroll value 48H) Solomon Systech Second Byte ---------- ---------- ---------- ---------- ---------- ---------- ---------- ---------- ---------- ...

Page 17

... Level Selector is a control of the display synchronization. Display voltage can be separated into two sets and used with different cycles. Synchronization is important since it selects the required LCD voltage level to the HV Buffer Cell, which in turn outputs the COM or SEG LCD waveform. SSD1859 Rev 1.0 P 17/48 Dec 2003 enable ...

Page 18

... When RESET command is issued, the following parameters are initialized only: 1. Page address is set Column address is set Initial Display Line is set to 0 (point to display RAM page 0, D0) 4. Internal Resistor Ratio register is set Software Contrast is set to 32 Solomon Systech www.DataSheet4U.com Dec 2003 P 18/48 Rev 1.0 SSD1859 ...

Page 19

... COM0 COM1 SEG0 SEG1 M * Note the number of multiplex ratio including Icon line enabled equal POR Figure 7 - LCD Driving Signal From SSD1859 SSD1859 Rev 1.0 P 19/48 Dec 2003 * ...

Page 20

... ROW0~79. This command has no effect on ICONS. COM0 is mapped to ROW0 after reset. The second command specifies the number of lines, excluding ICONS displayed. With Icon is disabled (POR), duties 1/16~1/80 could be selected. With Icon enabled, the available duty ratios are 1/17~ 1/81. P 20/48 Rev 1.0 SSD1859 ...

Page 21

... SSD1859 Rev 1.0 P 21/48 Dec 2003 Command Set N-line Inversion Set LCD Bias Reserved Set DC-DC Converter Factor Reserved Set Contrast ...

Page 22

... RAM contents *Note: This command will override the effect of “Set Normal/Inverse Display” R0=0: Normal display (display according to RAM contents, POR) R0=1: Inverse display (ON and OFF pixels are inverted) *Note: This command will not affect the display of the icon line P 22/48 Rev 1.0 SSD1859 ...

Page 23

... E5~ E9~EF F0~ SSD1859 Rev 1.0 P 23/48 Dec 2003 Command Set Power Save Mode Reserved Start Internal Oscillator Reserved Set Display On/Off Set Page Address Set COM Output ...

Page 24

... 1010 steps 1011 steps 1100 steps 1101 steps 1110 steps 1111 step Dec 2003 P 24/48 Rev 1.0 www.DataSheet4U.com SSD1859 ...

Page 25

... Mux (Icon Enable) FRAMEFQ Mux<= 18<=MUX<= 34<=MUX<= 50<=MUX<= 66<=MUX<= PWM is defined in command Set PWM and FRC. SSD1859 Rev 1.0 P 25/48 Dec 2003 Description Lower bits Adjustment 0000: No adjustment (P0R 0001 step ...

Page 26

... ON=1 : Display is ON =0: Chip is idle RES =1: Chip is executing reset RES pin for 6800-series parallel mode, pin for 6800-series parallel D/ C (1011X (0001X (0000X 26/48 Rev 1.0 SSD1859 ...

Page 27

... Set COM Output Scan Direction This command sets the scan direction of the COM output allowing layout flexibility in LCD module assembly. Set Power Control Register This command turns on/off the various power circuits associated with the chip. SSD1859 Rev 1.0 P 27/48 Dec 2003 www.DataSheet4U.com Solomon Systech ...

Page 28

... Voltage Range curves below is referred to the following formula:   R     out con R   1    1  * con  210  Figure 8 - Contrast Control Voltage Range Curve Solomon Systech , where V Vref ref Dec 2003 www.DataSheet4U.com P 28/48 Rev 1.0 SSD1859 ...

Page 29

... Hardware configuration is used for 6X setup. Set Icon Enable This command enable/disable the Icon display. Start Internal Oscillator After POR, the internal oscillator is OFF. It should be turned ON by sending this command to the chip. SSD1859 Rev 1.0 P 29/48 Dec 2003 Set Contrast Control Register Contrast Level Data ...

Page 30

... White Black BA BB Low during a data read (refer to Figure parallel D/ C Dec 2003 www.DataSheet4U.com FRAME FRAME (No use (XX (XX (XX (XX) P 30/48 Rev 1.0 SSD1859 ...

Page 31

... The current consumption will be reduced when enter the Low Power Mode. However, crosstalk compensation may be required after entered the low power mode. Crosstalk Compensation By using these double commands, 0xFC; 0xNN, to adjust the upper 4 bits and/or lower 4 bits, it can compensate the crosstalk. SSD1859 Rev 1.0 P 31/48 Dec 2003 www.DataSheet4U.com Solomon Systech ...

Page 32

... This device is not radiation protected. Solomon Systech ) SS Value Unit -0.3 to 4.0 V VSS-0 VSS+18.0 VDD to 4.0 V VSS-0 VDD+0 - -65 to +150 C < (Vin Dec 2003 P 32/48 Rev 1.0 www.DataSheet4U.com ) < OUT DD SSD1859 ...

Page 33

... IH1 (/RES, PS0, PS1, CS, D/C, R/ INTRS Input Low voltage IL1 (/RES, PS0, PS1, CS, D/C, R/ INTRS SSD1859 Rev 1.0 P 33/48 Dec 2003 , V =1.8 to 3.3V Test Condition (Absolute value referenced 2.7V, Voltage Generator DD CI On, 4X Converter Enabled, Write accessing, Tcyc = 3.3MHz, Frame Freq.=80Hz, Display On. ...

Page 34

... out Dec 2003 www.DataSheet4U.com Min Typ Max - VOUT - - ( 1)/a*VOUT - - ( 2)/a*VOUT - 2/a*VOUT 1/a*VOUT V - VOUT VOUT - 7.5 - ± -0.04 -0.05 -0.06 -0.06 -0.07 -0.08 P 34/48 Rev 1.0 SSD1859 Unit ...

Page 35

... AC ELECTRICAL CHARACTERISTICS Table Characteristics (T otherwise specified.) Symbol Parameter F Frame Frequency FRM Fosc / [Mux x (FRAMEFQ+1) x PWM] SSD1859 Rev 1.0 P 35/48 Dec 2003 =-40 to 85°C, Voltages referenced Test Condition Display ON, Set 128 x 81 Graphic Display Mode, Icon Line Enabled, 15PWM, Default frame frequency setting www ...

Page 36

... AH t cycle PW CSL DSW DHW Valid Data t t ACC DHR Valid Data Dec 2003 www.DataSheet4U.com Min Typ Max Unit 100 - - CSH 36/48 Rev 1.0 SSD1859 ...

Page 37

... R t Fall Time (Write data to driv er (Read data f rom driv er) Figure 11 - Parallel 6800-series Interface Timing Characteristics (PS0=H, PS1=H) SSD1859 Rev 1.0 P 37/48 Dec 2003 Parameter cycle PW CSL DSW DHW Valid Data t t ...

Page 38

... PW CSL Valid Data Valid Data Dec 2003 www.DataSheet4U.com Min Typ Max Unit 100 - - CSH 38/48 Rev 1.0 SSD1859 ...

Page 39

... Fall Time F D (R/ (Write dat a to driver (Read data from driver) Figure 13 - Parallel 8080-series Interface Timing Characteristics (PS0=H, PS1=L) SSD1859 Rev 1.0 P 39/48 Dec 2003 Parameter t cycl e PW CSL Valid Data Valid Data www ...

Page 40

... AS t CSS t c ycle DSW DHW Valid Data Dec 2003 www.DataSheet4U.com =0V) SS Min Typ Max 40/48 Rev 1.0 SSD1859 Unit ...

Page 41

... Clock Low Time CLKL t Clock High Time CLKH t Rise Time R t Fall Time F D/C (Required if PS1 = H) CS SCK SDA CS SCK D7 SDA Figure 15 - Serial Timing Characteristics (PS0=L) SSD1859 Rev 1.0 P 41/48 Dec 2003 = - 1.8V Parameter CSS t c ycle ...

Page 42

... DISPLAY PANEL SIZE 128 ICON LINE SEG0 ………………………………………….…………. Segment Remapped [Command: A1) SSD1859 DIE 81 MUX (DIE FACE IP) CONTOL CIRCUIT 16 Figure - Application Circuit Dec 2003 www ...

Page 43

... External Regulator and Internal Bias Divider [COMMAND: 2D] VR VOUT VL5 VL4 VL3 VL2 6X DC-DC Converter Factor [COMMAND: 67] CXP Capacitor = 0.1uF – 1uF CXN SSD1859 Rev 1.0 P 43/48 Dec 2003 Capacitor = 2.2uF – 4.7uF Remarks: INTRS = ‘H’ Capacitor = 2.2uF – 4.7uF VSS Remarks: INTRS = ‘L’ www.DataSheet4U.com Solomon Systech ...

Page 44

... Wait at least 2 seconds (12) Hardware Reset Verify the result by repeating step 1. (2) – (3) SSD1859 VOUT + GND RES Solomon Systech RES pin) RES pin) ( (1) & (6) & (12) Note 10k ohm 4.7u F OTP Programming Circuit Dec 2003 www.DataSheet4U.com 16-18V GND P 44/48 Rev 1.0 SSD1859 ...

Page 45

... Accept the contrast level on panel? Yes OTP setting step = Adjusted contrast value – Original contrast value SSD1859 Rev 1.0 P 45/48 Dec 2003 i) Hardware reset ii) Enable oscillator Connect an external voltage (16-18V) on VOUT pins (i) Send OTP setting commands (ii) Send OTP programming ...

Page 46

... GDDRAM \\ Set Display On \\ Enable Oscillator \\ Set OTP offset value to +3 (0011) \\ 0001 where Send the OTP programming command Dec 2003 www.DataSheet4U.com pin RES pin RES the OTP offset value 1 0 pin RES P 46/48 Rev 1.0 SSD1859 ...

Page 47

... PACKAGE INFORMATION DIE TRAY DIMENSIONS Spec mm W1 50.70 0.2 W2 45.50 0.2 H 4.05 0.2 Px 14.14 0.1 Py 2.33 0.1 X 11.07 + 0.1/-0 Y 1.17 + 0.1/-0 Z 0.68 +0.1/-0 X1 4.00 0. SSD1859 Rev 1.0 P 47/48 Dec 2003 (mil) (1996) (1791) (160) (557) (92) (436) (46) (27) (157) www.DataSheet4U.com Solomon Systech ...

Page 48

... Solomon Systech was negligent regarding the design or manufacture of the part. http://www.solomon-systech.com Solomon Systech www.DataSheet4U.com Dec 2003 P 48/48 Rev 1.0 SSD1859 ...

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