IDT72605L35J8 IDT, Integrated Device Technology Inc, IDT72605L35J8 Datasheet

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IDT72605L35J8

Manufacturer Part Number
IDT72605L35J8
Description
IC FIFO BI SYNC 256X18 68-PLCC
Manufacturer
IDT, Integrated Device Technology Inc
Series
7200r
Datasheet

Specifications of IDT72605L35J8

Function
Synchronous
Memory Size
9.2K (512 x 18)
Access Time
35ns
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
68-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Rate
-
Other names
72605L35J8

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IDT72605L35J8
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
FEATURES:
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FUNCTIONAL BLOCK DIAGRAM
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc. The SyncBiFIFO is a trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
©2009 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.
PAE
PAF
CLK
R/W
R/W
Two independent FIFO memories for fully bidirectional data
transfers
256 x 18 x 2 organization (IDT72605)
512 x 18 x 2 organization (IDT72615)
Synchronous interface for fast (20ns) read and write cycle times
Each data port has an independent clock and read/write control
Output enable is provided on each port as a three-state control
of the data bus
Built-in bypass path for direct data transfer between two ports
Two fixed flags, Empty and Full, for both the A-to-B and the B-
to-A FIFO
Programmable flag offset can be set to any depth in the FIFO
The synchronous BiFIFO is packaged in a 64-pin TQFP (Thin
Quad Flatpack) and 68-pin PLCC
Industrial temperature range (–40° ° ° ° ° C to +85° ° ° ° ° C)
Green parts available, see ordering information
EF
FF
OE
OE
EN
CS
EN
A
A
A
AB
AB
AB
AB
A
B
B
A
A
A
2
1
0
B
B
CLK
INTERFACE
CONTROL
CONTROL
A
LOGIC
FLAG
HIGH
HIGH
µP
Z
Z
BYP
B
MEMORY
512 x 18
256 x 18
ARRAY
OUTPUT REGISTER
INPUT REGISTER
CMOS SyncBiFIFO
256 x 18 x 2
512 x 18 x 2
MUX
D
D
A0
B0
1
-D
-D
DESCRIPTION:
tional First-In, First-Out (FIFO) memories, with synchronous interface for fast
read and write cycle times. The SyncBiFIFO™ is a data buffer that can store
or retrieve information from two sources simultaneously. Two Dual-Port FIFO
memory arrays are contained in the SyncBiFIFO; one data buffer for each
direction.
transferred into the I/O registers on clock edges, hence the interfaces are
synchronous. Each Port has its own independent clock. Data transfers to the
I/O registers are gated by the enable signals. The transfer direction for each
port is controlled independently by a read/write signal. Individual output enable
signals control whether the SyncBiFIFO is driving the data lines of a port or
whether those data lines are in a high-impedance state.
register in either direction.
and Almost-Empty for both FIFO memories. The offset depths of the Almost-Full
and Almost-Empty flags can be programmed to any location.
technology.
A17
B17
The IDT72605 and IDT72615 are very high-speed, low-power bidirec-
The SyncBiFIFO has registers on all inputs and outputs. Data is only
Bypass control allows data to be directly transferred from input to output
The SyncBiFIFO has eight flags. The flag pins are Full, Empty, Almost-Full,
The SyncBiFIFO is fabricated using IDT’s high-speed, submicron CMOS
TM
OUTPUT REGISTER
INPUT REGISTER
MUX
MEMORY
512 x 18
256 x 18
ARRAY
SUPPLY
POWER
FEBRUARY 2009
RESET
LOGIC
LOGIC
FLAG
IDT72605
IDT72615
2704 drw 01
3
7
DSC-2704/9
RS
EF
PAE
PAF
FF
V
GND
CC
BA
BA
BA
BA

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IDT72605L35J8 Summary of contents

Page 1

FEATURES: • • • • • Two independent FIFO memories for fully bidirectional data transfers • • • • • 256 organization (IDT72605) • • • • • 512 organization (IDT72615) • ...

Page 2

IDT72605/72615 CMOS SYNCBiFIFO™ 256 x 18x 2 and 512 PIN CONFIGURATIONS D A16 C A17 CLK R PAE PAF OE D B17 D B16 PIN ...

Page 3

IDT72605/72615 CMOS SYNCBiFIFO™ 256 x 18x 2 and 512 PIN DESCRIPTION Symbol Name I Data A I/O Data inputs & outputs for the 18-bit Port A bus. A0 A17 CS Port A is accessed ...

Page 4

IDT72605/72615 CMOS SYNCBiFIFO™ 256 x 18x 2 and 512 ABSOLUTE MAXIMUM RATINGS Symbol Rating V Terminal Voltage with TERM Respect to Ground T Storage Temperature STG I DC Output Current OUT NOTE: 1. Stresses greater than ...

Page 5

IDT72605/72615 CMOS SYNCBiFIFO™ 256 x 18x 2 and 512 TEST CONDITIONS In Pulse Levels Input Rise/Fall Times Input Timing Reference Levels Output Reference Levels Output Load AC ELECTRICAL CHARACTERISTICS (Industrial ± 10%, ...

Page 6

IDT72605/72615 CMOS SYNCBiFIFO™ 256 x 18x 2 and 512 FUNCTIONAL DESCRIPTION IDTs SyncBiFIFO is versatile for both multiprocessor and peripheral applications. Data can be stored or retrieved from two sources simultaneously. The SyncBiFIFO has registers on ...

Page 7

IDT72605/72615 CMOS SYNCBiFIFO™ 256 x 18x 2 and 512 TABLE 1 ⎯ PORT A OPERATION CONTROL SIGNALS Data R/W I ...

Page 8

IDT72605/72615 CMOS SYNCBiFIFO™ 256 x 18x 2 and 512 and EN can be written or read in Port B. If R/W B input register, and on LOW-to-HIGH transition of CLK is HIGH and OE register and ...

Page 9

IDT72605/72615 CMOS SYNCBiFIFO™ 256 x 18x 2 and 512 AB, PAE AB, EF BA, PAE BA EF AB, PAE AB, EF BA, PAE CLKH CLK ...

Page 10

IDT72605/72615 CMOS SYNCBiFIFO™ 256 x 18x 2 and 512 CLK R A0- A17 OE A CLK B ...

Page 11

IDT72605/72615 CMOS SYNCBiFIFO™ 256 x 18x 2 and 512 CLK B R B0- B17 OE B CLK A NO WRITE OPERATION CLK ...

Page 12

IDT72605/72615 CMOS SYNCBiFIFO™ 256 x 18x 2 and 512 CLK B R B0- B17 t SKEW1 CLK R/W A ...

Page 13

IDT72605/72615 CMOS SYNCBiFIFO™ 256 x 18x 2 and 512 CLK R DATA INPUT A0- ...

Page 14

IDT72605/72615 CMOS SYNCBiFIFO™ 256 x 18x 2 and 512 CLK B R BYP B0- B17 t SKEW1 CLK ...

Page 15

IDT72605/72615 CMOS SYNCBiFIFO™ 256 x 18x 2 and 512 CLKH CLKL CLK (R WRITE PAE AB n words in FIFO (1) t SKEW2 CLK B EN ...

Page 16

IDT72605/72615 CMOS SYNCBiFIFO™ 256 x 18x 2 and 512 CLKH CLKL CLK (R WRITE PAE BA n words in FIFO (1) t SKEW2 CLK A EN ...

Page 17

ORDERING INFORMATION X XXXXX XX Device Type Power Speed DATASHEET DOCUMENT HISTORY 11/02/2000 pgs 04/08/2003 pg. 17. 02/08/2009 pgs. 1 and 17. CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138 X X ...

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