AD8147 Analog Devices, AD8147 Datasheet - Page 18

• Manufacturer Part Number: AD8147
• Description: Triple Differential Driver for Wideband Video
• Manufacturer: Analog Devices

AD8146/AD8147/AD8148
Sync pulse amplitudes applied to the AD8147 and AD8148
must be less than or equal to the positive supply voltage. In low
positive supply applications, such as those that use ±2.5 V supplies,
external limiting may be required because many logic families
produce amplitudes up to 5 V. Figure 32 illustrates how to use a
monolithic triple diode to limit a sync pulse with 5 V amplitude
to an amplitude of approximately 2 V.
DRIVING TWO UTP CABLES WITH ONE DRIVER
Some applications require driving two UTP cables with a single
driver. Each individual driver of the AD8146/AD8147/AD8148
is capable of driving two doubly terminated cables, which places
a differential load of 100 Ω across the outputs of the driver.
Figure 33 illustrates how to drive two cables.
Figure 32. Limiting Sync Pulse Amplitude in Low Positive Supply Applications
AD8146/AD8147/AD8148
+5V
SYNC PULSE
0V
INCOMING
Figure 33. Driving Two UTP Cables With One Driver
V
OCM
301Ω
1
6
2
5
3
4
49.9Ω
49.9Ω
49.9Ω
49.9Ω
HN2D02FUTW1T1
100Ω
UTP
100Ω
UTP
SYNC PULSE
+2V
0V
LIMITED
100Ω
100Ω
Rev. 0 | Page 18 of 24
Driver bandwidth is affected to a small degree when driving the
100 Ω load presented by the two cables, as compared with
driving a typical 200 Ω load. Figure 34 illustrates the AD8146/
AD8147/AD8148 bandwidths when driving a 100 Ω load.
USING THE AD8146 AS A RECEIVER
While the AD8146 excels as a differential driver, it can also be
used as a differential-to-differential receiver applied as an
input buffer that protects a more sophisticated device, such as a
differential crosspoint switch. See Figure 35 for an illustration of
this type of application.
Because the AD8146 V
incoming common-mode signal, such as encoded sync pulses,
can be reproduced at the AD8146 outputs by stripping it from
the received signal and applying it directly to the V
The two series 54.9 Ω resistors form a differential termination
resistor of 109.8 Ω, which when loaded with the 1 kΩ differential
input resistance of the AD8146, provides an overall termination
of approximately 100 Ω. The received common-mode voltages
are available at the center taps between the two resistors.
Figure 34. Large Signal Frequency Response Driving 100 Ω Loads
15
12
–3
9
6
3
0
1
R
V
OUT
L, dm
= 2V p-p
= 100Ω
OCM
10
FREQUENCY (MHz)
input pins are uncommitted, any
100
AD8148
AD8147
AD8146
OCM
1000
pin.