MIC2583 Micrel Semiconductor, MIC2583 Datasheet - Page 3

• Manufacturer Part Number: MIC2583
• Description: Single Channel Hot Swap Controllers
• Manufacturer: Micrel Semiconductor

Pin Description
April 2003
MIC2582/MIC2583
Pin Name
SENSE
CPOR
GATE
/POR
GND
VCC
ON
FB
8-pin SOIC
1
2
3
4
5
6
7
8
16-pin QSOP
7,8
12
14
15
16
1
3
4
Pin Function
Power-On Reset Output: Open drain N-channel device, Active Low. This pin
remains asserted during start-up until a time period (t
voltage rises above the power-good threshold (V
C
falls below V
The /POR pin requires a pull-up resistor (10k minimum) to VCC.
ON Input: Active High. The ON pin, an input to a Schmitt-triggered compara-
tor used to enable/disable the controller, is compared to a 1.24V reference
with 50mV of hysteresis. When a logic high is applied to the ON pin
(V
ramping up towards its final operating voltage. When the ON pin receives a
logic low signal (V
remains high if VCC is above the UVLO threshold. ON must be low for 20 s
in order to initiate a start-up sequence. Additionally, toggling the ON pin
LOW to HIGH resets the circuit breaker.
Power-On Reset Timer: A capacitor connected between this pin and ground
sets the supply contact start-up delay (t
interval (t
connected to CPOR begins to charge. When the voltage at CPOR crosses
0.3V, the start-up threshold (V
asserted while capacitor C
the voltage at FB rises above V
When the voltage at CPOR rises above the power-on reset delay threshold
(V
If C
Ground connection: Tie to analog ground.
Power-Good Threshold Input (Undervoltage Detect): This input is internally
compared to a 1.24V reference with 30mV of hysteresis. An external
resistive divider may be used to set the voltage at this pin. If this input
momentarily goes below 1.24V, then /POR is activated for one timing cycle,
t
asserts one timing cycle after the FB pin exceeds the power-good threshold
by 30mV. A 5 s filter on this pin prevents glitches from inadvertently
activating this signal.
Gate Drive Output: Connects to the gate of an external N-channel MOSFET.
An internal clamp ensures that no more than 9V is applied between the
GATE pin and the source of the external MOSFET. The GATE pin is
immediately brought low when either the circuit breaker trips or an
undervoltage lockout condition occurs.
Circuit Breaker Sense Input: A resistor between this pin and VCC sets the
current limit threshold. Whenever the voltage across the sense resistor
exceeds the slow trip current limit threshold (V
is adjusted to ensure a constant load current. If V
exceeded for longer than time period t
tripped and the GATE pin is immediately pulled low. If the voltage across the
sense resistor exceeds the fast trip circuit breaker threshold, V
any point due to fast, high amplitude power supply faults, then the GATE pin
is immediately brought low without delay. To disable the circuit breaker, the
SENSE and VCC pins can be tied together.
The default V
are available: 150mV, 200mV, or OFF (V
factory for availability of other options.
Positive Supply Input: 2.3V to 13.2V. The GATE pin is held low by an
internal undervoltage lockout circuit until VCC exceeds a threshold of 2.2V. If
VCC exceeds 13.2V, an internal shunt regulator protects the chip from
transient voltages up to 20V at the VCC and SENSE pins.
POR
POR
ON
TH
POR
, indicating an output undervoltage condition. The /POR signal de-
), the timer resets by pulling CPOR to ground, and /POR is de-asserted.
> 1.24V), a start-up sequence begins when the GATE pin starts
determines t
= 0, then t
POR
3
FB
). When VCC rises above the UVLO threshold, the capacitor
TRIPFAST
, /POR is asserted for a minimum of one timing cycle (t
ON
START
POR
< 1.19V), the GATE pin is grounded and /FAULT
. When the output voltage monitored at the FB pin
for either device is 100mV. Other fast trip thresholds
defaults to 20 s.
POR
START
is immediately discharged to ground. When
FB
, capacitor CPOR begins to charge again.
), a start cycle is initiated if ON is
OCSLOW
START
TRIPFAST
) and the power-on reset
, then the circuit breaker is
TRIPSLOW
FB
TRIPSLOW
disabled). Please contact
). The timing capacitor
POR
), the GATE voltage
) after the FB pin
MIC2582/MIC2583
(50mV) is
TRIPFAST
POR
, at
Micrel
).