LM3S1162 Luminary Micro, Inc, LM3S1162 Datasheet - Page 4

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LM3S1162

Manufacturer Part Number
LM3S1162
Description
Lm3s1162 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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Table of Contents
6.1.2
6.1.3
6.1.4
6.1.5
6.2
6.3
6.4
7
7.1
7.2
7.2.1
7.2.2
7.2.3
7.2.4
7.2.5
7.2.6
7.2.7
7.3
7.3.1
7.3.2
7.3.3
7.3.4
7.3.5
7.4
7.5
8
8.1
8.2
8.2.1
8.2.2
8.3
8.3.1
8.3.2
8.4
8.5
8.6
9
9.1
9.1.1
9.1.2
9.1.3
9.1.4
9.1.5
9.1.6
9.2
9.3
9.4
4
Reset Control ............................................................................................................................ 61
Power Control ........................................................................................................................... 64
Clock Control ............................................................................................................................ 64
System Control ......................................................................................................................... 67
Initialization and Configuration ................................................................................................... 68
Register Map ............................................................................................................................ 69
Register Descriptions ................................................................................................................ 70
Hibernation Module .......................................................................................................... 123
Block Diagram ........................................................................................................................ 124
Functional Description ............................................................................................................. 124
Register Access Timing ........................................................................................................... 124
Clock Source .......................................................................................................................... 125
Battery Management ............................................................................................................... 126
Real-Time Clock ...................................................................................................................... 127
Non-Volatile Memory ............................................................................................................... 127
Power Control ......................................................................................................................... 127
Interrupts and Status ............................................................................................................... 128
Initialization and Configuration ................................................................................................. 128
Initialization ............................................................................................................................. 128
RTC Match Functionality (No Hibernation) ................................................................................ 129
RTC Match/Wake-Up from Hibernation ..................................................................................... 129
External Wake-Up from Hibernation .......................................................................................... 129
RTC/External Wake-Up from Hibernation .................................................................................. 129
Register Map .......................................................................................................................... 129
Register Descriptions .............................................................................................................. 130
Internal Memory ............................................................................................................... 143
Block Diagram ........................................................................................................................ 143
Functional Description ............................................................................................................. 143
SRAM Memory ........................................................................................................................ 143
Flash Memory ......................................................................................................................... 144
Flash Memory Initialization and Configuration ........................................................................... 145
Flash Programming ................................................................................................................. 145
Nonvolatile Register Programming ........................................................................................... 146
Register Map .......................................................................................................................... 146
Flash Register Descriptions (Flash Control Offset) ..................................................................... 147
Flash Register Descriptions (System Control Offset) .................................................................. 154
General-Purpose Input/Outputs (GPIOs) ....................................................................... 167
Functional Description ............................................................................................................. 167
Data Control ........................................................................................................................... 168
Interrupt Control ...................................................................................................................... 169
Mode Control .......................................................................................................................... 170
Commit Control ....................................................................................................................... 170
Pad Control ............................................................................................................................. 170
Identification ........................................................................................................................... 170
Initialization and Configuration ................................................................................................. 171
Register Map .......................................................................................................................... 172
Register Descriptions .............................................................................................................. 174
Preliminary
July 26, 2008

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