LM3S1332 Luminary Micro, Inc, LM3S1332 Datasheet - Page 16
LM3S1332
Manufacturer Part Number
LM3S1332
Description
Lm3s1332 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S1332.pdf
(447 pages)
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Table of Contents
Synchronous Serial Interface (SSI) ............................................................................................ 334
Register 1:
Register 2:
Register 3:
Register 4:
Register 5:
Register 6:
Register 7:
Register 8:
Register 9:
Register 10:
Register 11:
Register 12:
Register 13:
Register 14:
Register 15:
Register 16:
Register 17:
Register 18:
Register 19:
Register 20:
Register 21:
Analog Comparators ................................................................................................................... 371
Register 1:
Register 2:
Register 3:
Register 4:
Register 5:
Register 6:
Register 7:
Register 8:
Register 9:
Register 10:
16
SSI Control 0 (SSICR0), offset 0x000 .............................................................................. 346
SSI Control 1 (SSICR1), offset 0x004 .............................................................................. 348
SSI Data (SSIDR), offset 0x008 ...................................................................................... 350
SSI Status (SSISR), offset 0x00C ................................................................................... 351
SSI Clock Prescale (SSICPSR), offset 0x010 .................................................................. 353
SSI Interrupt Mask (SSIIM), offset 0x014 ......................................................................... 354
SSI Raw Interrupt Status (SSIRIS), offset 0x018 .............................................................. 356
SSI Masked Interrupt Status (SSIMIS), offset 0x01C ........................................................ 357
SSI Interrupt Clear (SSIICR), offset 0x020 ....................................................................... 358
SSI Peripheral Identification 4 (SSIPeriphID4), offset 0xFD0 ............................................. 359
SSI Peripheral Identification 5 (SSIPeriphID5), offset 0xFD4 ............................................. 360
SSI Peripheral Identification 6 (SSIPeriphID6), offset 0xFD8 ............................................. 361
SSI Peripheral Identification 7 (SSIPeriphID7), offset 0xFDC ............................................ 362
SSI Peripheral Identification 0 (SSIPeriphID0), offset 0xFE0 ............................................. 363
SSI Peripheral Identification 1 (SSIPeriphID1), offset 0xFE4 ............................................. 364
SSI Peripheral Identification 2 (SSIPeriphID2), offset 0xFE8 ............................................. 365
SSI Peripheral Identification 3 (SSIPeriphID3), offset 0xFEC ............................................ 366
SSI PrimeCell Identification 0 (SSIPCellID0), offset 0xFF0 ............................................... 367
SSI PrimeCell Identification 1 (SSIPCellID1), offset 0xFF4 ............................................... 368
SSI PrimeCell Identification 2 (SSIPCellID2), offset 0xFF8 ............................................... 369
SSI PrimeCell Identification 3 (SSIPCellID3), offset 0xFFC ............................................... 370
Analog Comparator Masked Interrupt Status (ACMIS), offset 0x00 .................................... 377
Analog Comparator Raw Interrupt Status (ACRIS), offset 0x04 ......................................... 378
Analog Comparator Interrupt Enable (ACINTEN), offset 0x08 ........................................... 379
Analog Comparator Reference Voltage Control (ACREFCTL), offset 0x10 ......................... 380
Analog Comparator Status 0 (ACSTAT0), offset 0x20 ....................................................... 381
Analog Comparator Status 1 (ACSTAT1), offset 0x40 ....................................................... 381
Analog Comparator Status 2 (ACSTAT2), offset 0x60 ....................................................... 381
Analog Comparator Control 0 (ACCTL0), offset 0x24 ....................................................... 382
Analog Comparator Control 1 (ACCTL1), offset 0x44 ....................................................... 382
Analog Comparator Control 2 (ACCTL2), offset 0x64 ...................................................... 382
Preliminary
July 26, 2008
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