LM3S1332 Luminary Micro, Inc, LM3S1332 Datasheet - Page 405
LM3S1332
Manufacturer Part Number
LM3S1332
Description
Lm3s1332 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S1332.pdf
(447 pages)
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July 26, 2008
Pin Name
SSI0Clk
SSI0Fss
SSI0Rx
SSI0Tx
SWCLK
SWDIO
VDD25
TRST
U0Rx
U0Tx
U1Rx
U1Tx
VBAT
PF3
PF4
PF5
PF6
PF7
PG0
PG1
PG2
PG3
PG4
PG5
PG6
PG7
PH0
PH1
PH2
PH3
RST
SWO
TCK
TDI
TDO
TMS
Pin Number
C10
D10
D11
H11
A10
A10
L12
J12
M8
M7
M4
M5
M3
K4
K1
K2
K3
C9
C8
A9
B9
A9
B8
B9
A8
H2
H1
C3
L9
L8
J1
J2
L7
L4
L5
L3
Preliminary
Pin Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
-
-
I
I
I
I
I
I
I
I
Buffer Type
Power
Power
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
Description
GPIO port F bit 3
GPIO port F bit 4
GPIO port F bit 5
GPIO port F bit 6
GPIO port F bit 7
GPIO port G bit 0
GPIO port G bit 1
GPIO port G bit 2
GPIO port G bit 3
GPIO port G bit 4
GPIO port G bit 5
GPIO port G bit 6
GPIO port G bit 7
GPIO port H bit 0
GPIO port H bit 1
GPIO port H bit 2
GPIO port H bit 3
System reset input.
SSI module 0 clock
SSI module 0 frame
SSI module 0 receive
SSI module 0 transmit
JTAG/SWD CLK
JTAG TMS and SWDIO
JTAG TDO and SWO
JTAG/SWD CLK
JTAG TDI
JTAG TDO and SWO
JTAG TMS and SWDIO
JTAG TRSTn
UART module 0 receive. When in IrDA mode,
this signal has IrDA modulation.
UART module 0 transmit. When in IrDA mode,
this signal has IrDA modulation.
UART module 1 receive. When in IrDA mode,
this signal has IrDA modulation.
UART module 1 transmit. When in IrDA mode,
this signal has IrDA modulation.
Power source for the Hibernation Module. It
is normally connected to the positive terminal
of a battery and serves as the battery
backup/Hibernation Module power-source
supply.
Positive supply for most of the logic function,
including the processor core and most
peripherals.
LM3S1332 Microcontroller
405
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